mirror of
https://github.com/X11Libre/xf86-video-xgi.git
synced 2026-03-24 01:24:35 +00:00
Remove unused source files.
vb_inta.[ch] appear to be from the Windows version (???) of the driver. xgi_vid*.c appear to be older versions of xgi_video.c. I'm not sure what the purpose of xgi_vidregs.h ever was.
This commit is contained in:
Ian Romanick
1969
src/vb_inta.c
1969
src/vb_inta.c
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#ifndef _VBINTA_
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#define _VBINTA_
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extern void SiSLVDSCH7019ControlCallback(PHW_DEVICE_EXTENSION pHWDE,PVOID Context);
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extern void SiSTVCH7019ControlCallback(PHW_DEVICE_EXTENSION pHWDE, PVOID Context);
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extern void XGINew_ExternalToBackup(PHW_DEVICE_EXTENSION pHWDE);
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extern void XGINew_SetReadExternal(PHW_DEVICE_EXTENSION pHWDE);
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extern void XGINew_SetReadInternal(PHW_DEVICE_EXTENSION pHWDE);
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extern void XGINew_DisableWriteBackup(PHW_DEVICE_EXTENSION pHWDE);
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extern void XGINew_EnableWriteBackup(PHW_DEVICE_EXTENSION pHWDE);
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extern void XGINew_TurnOnBacklight(PHW_DEVICE_EXTENSION pHWDE);
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extern int XGINew_WantToSetMode(PHW_DEVICE_EXTENSION pHWDE);
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extern int XGINew_WantToChangeTimingRegister(PHW_DEVICE_EXTENSION pHWDE);
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extern int XGINew_ReSet301VBTiming(PHW_DEVICE_EXTENSION pHWDE);
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extern void XGINew_TurnOffBacklight(PHW_DEVICE_EXTENSION pHWDE);
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extern void XGINew_EnableWriteInternal(PHW_DEVICE_EXTENSION pHWDE);
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extern void XGINew_DisableWriteInternal(PHW_DEVICE_EXTENSION pHWDE);
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extern void XGINew_EnableWriteExternal(PHW_DEVICE_EXTENSION pHWDE);
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extern void XGINew_DisableWriteExternal(PHW_DEVICE_EXTENSION pHWDE);
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extern void XGINew_GRandAR13Changed(PHW_DEVICE_EXTENSION pHWDE);
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extern BOOLEAN XGINew_IsVAMode(PVB_DEVICE_INFO pVBInfo);
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#endif
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1503
src/xgi_vdeo_old.c
1503
src/xgi_vdeo_old.c
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1402
src/xgi_vide2.c
1402
src/xgi_vide2.c
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1273
src/xgi_video1.c
1273
src/xgi_video1.c
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1529
src/xgi_video_11.c
1529
src/xgi_video_11.c
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1238
src/xgi_video_g.c
1238
src/xgi_video_g.c
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#ifndef _SIS_VIDREG_H_
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#define _SIS_VIDREG_H_
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/* VGA standard register */
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#define Index_SR_Graphic_Mode 0x06
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#define Index_SR_RAMDAC_Ctrl 0x07
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#define Index_SR_Threshold_Ctrl1 0x08
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#define Index_SR_Threshold_Ctrl2 0x09
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#define Index_SR_Misc_Ctrl 0x0F
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#define Index_SR_DDC 0x11
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#define Index_SR_Feature_Connector_Ctrl 0x12
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#define Index_SR_DRAM_Sizing 0x14
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#define Index_SR_DRAM_State_Machine_Ctrl 0x15
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#define Index_SR_AGP_PCI_State_Machine 0x21
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#define Index_SR_Internal_MCLK0 0x28
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#define Index_SR_Internal_MCLK1 0x29
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#define Index_SR_Internal_DCLK1 0x2B
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#define Index_SR_Internal_DCLK2 0x2C
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#define Index_SR_Internal_DCLK3 0x2D
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#define Index_SR_Ext_Clock_Sel 0x32
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#define Index_SR_Int_Status 0x34
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#define Index_SR_Int_Enable 0x35
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#define Index_SR_Int_Reset 0x36
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#define Index_SR_Power_On_Trap 0x38
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#define Index_SR_Power_On_Trap2 0x39
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#define Index_SR_Power_On_Trap3 0x3A
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/* video registers */
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#define Index_VI_Passwd 0x00
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#define Index_VI_Win_Hor_Disp_Start_Low 0x01
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#define Index_VI_Win_Hor_Disp_End_Low 0x02
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#define Index_VI_Win_Hor_Over 0x03
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#define Index_VI_Win_Ver_Disp_Start_Low 0x04
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#define Index_VI_Win_Ver_Disp_End_Low 0x05
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#define Index_VI_Win_Ver_Over 0x06
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#define Index_VI_Disp_Y_Buf_Start_Low 0x07
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#define Index_VI_Disp_Y_Buf_Start_Middle 0x08
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#define Index_VI_Disp_Y_Buf_Start_High 0x09
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#define Index_VI_U_Buf_Start_Low 0x0A
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#define Index_VI_U_Buf_Start_Middle 0x0B
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#define Index_VI_U_Buf_Start_High 0x0C
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#define Index_VI_V_Buf_Start_Low 0x0D
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#define Index_VI_V_Buf_Start_Middle 0x0E
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#define Index_VI_V_Buf_Start_High 0x0F
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#define Index_VI_Disp_Y_Buf_Pitch_Low 0x10
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#define Index_VI_Disp_UV_Buf_Pitch_Low 0x11
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#define Index_VI_Disp_Y_UV_Buf_Pitch_High 0x12
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#define Index_VI_Disp_Y_Buf_Preset_Low 0x13
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#define Index_VI_Disp_Y_Buf_Preset_Middle 0x14
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#define Index_VI_UV_Buf_Preset_Low 0x15
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#define Index_VI_UV_Buf_Preset_Middle 0x16
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#define Index_VI_Disp_Y_UV_Buf_Preset_High 0x17
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#define Index_VI_Hor_Post_Up_Scale_Low 0x18
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#define Index_VI_Hor_Post_Up_Scale_High 0x19
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#define Index_VI_Ver_Up_Scale_Low 0x1A
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#define Index_VI_Ver_Up_Scale_High 0x1B
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#define Index_VI_Scale_Control 0x1C
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#define Index_VI_Play_Threshold_Low 0x1D
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#define Index_VI_Play_Threshold_High 0x1E
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#define Index_VI_Line_Buffer_Size 0x1F
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/* Destination color key */
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#define Index_VI_Overlay_ColorKey_Red_Min 0x20
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#define Index_VI_Overlay_ColorKey_Green_Min 0x21
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#define Index_VI_Overlay_ColorKey_Blue_Min 0x22
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#define Index_VI_Overlay_ColorKey_Red_Max 0x23
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#define Index_VI_Overlay_ColorKey_Green_Max 0x24
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#define Index_VI_Overlay_ColorKey_Blue_Max 0x25
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/* Source color key */
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#define Index_VI_Overlay_ChromaKey_Red_Y_Min 0x26
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#define Index_VI_Overlay_ChromaKey_Green_U_Min 0x27
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#define Index_VI_Overlay_ChromaKey_Blue_V_Min 0x28
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#define Index_VI_Overlay_ChromaKey_Red_Y_Max 0x29
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#define Index_VI_Overlay_ChromaKey_Green_U_Max 0x2A
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#define Index_VI_Overlay_ChromaKey_Blue_V_Max 0x2B
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#define Index_VI_Contrast_Factor 0x2C
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#define Index_VI_Brightness 0x2D
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#define Index_VI_Contrast_Enh_Ctrl 0x2E
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#define Index_VI_Key_Overlay_OP 0x2F
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#define Index_VI_Control_Misc0 0x30
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#define Index_VI_Control_Misc1 0x31
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#define Index_VI_Control_Misc2 0x32
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#define Index_MPEG_Read_Ctrl0 0x60
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#define Index_MPEG_Read_Ctrl1 0x61
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#define Index_MPEG_Read_Ctrl2 0x62
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#define Index_MPEG_Read_Ctrl3 0x63
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#define Index_MPEG_Ver_Up_Scale_Low 0x64
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#define Index_MPEG_Ver_Up_Scale_High 0x65
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/*
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CRT_2 function control register
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*/
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#define Index_CRT2_FC_CONTROL 0x00
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#define Index_CRT2_FC_SCREEN_HIGH 0x04
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#define Index_CRT2_FC_SCREEN_MID 0x05
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#define Index_CRT2_FC_SCREEN_LOW 0x06
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#define Index_CRT2_FC_ENABLE_WRITE 0x24
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#define Index_CRT2_FC_VR 0x25
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#define Index_CRT2_FC_VCount 0x27
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#define Index_CRT2_FC_VCount1 0x28
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/* video attributes - these should probably be configurable on the fly
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* so users with different desktop sizes can keep
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* captured data off the desktop
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*/
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#define _VINWID 704
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#define _VINHGT _VINHGT_NTSC
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#define _VINHGT_NTSC 240
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#define _VINHGT_PAL 290
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#define _VIN_WINDOW (704 * 291 * 2)
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#define _VBI_WINDOW (704 * 64 * 2)
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#define _VIN_FIELD_EVEN 1
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#define _VIN_FIELD_ODD 2
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#define _VIN_FIELD_BOTH 4
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#define vc_index_offset 0x00
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#define vc_data_offset 0x01
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#define vi_index_offset 0x02
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#define vi_data_offset 0x03
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#define crt2_index_offset 0x04
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#define crt2_port_offset 0x05
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#define sr_index_offset 0x44
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#define sr_data_offset 0x45
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#define cr_index_offset 0x54
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#define cr_data_offset 0x55
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#define input_stat 0x5A
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/* i2c registers */
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#define X_INDEXREG 0x14
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#define X_PORTREG 0x15
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#define X_DATA 0x0f
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#define I2C_SCL 0x00
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#define I2C_SDA 0x01
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#define I2C_DELAY 10
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/* mmio registers */
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#define REG_PRIM_CRT_COUNTER 0x8514
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#endif /* _SIS_VIDREG_H_ */
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