mirror of
https://github.com/X11Libre/xf86-video-xgi.git
synced 2026-03-24 01:24:35 +00:00
Use correct type for variable.
Fixes many warnings of this type: xgi.h:1016:14: note: expected 'XGIIOADDRESS' but argument is of type 'PUCHAR' Signed-off-by: Thomas Klausner <wiz@NetBSD.org> Reviewed-by: Connor Behan <connor.behan@gmail.com>
This commit is contained in:
38
src/vb_i2c.c
38
src/vb_i2c.c
@@ -114,7 +114,7 @@ typedef enum _I2C_ACCESS_CMD
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#define ENABLE_GPIOC 0x04
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VOID
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EnableGPIOA(
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PUCHAR pjIOPort, I2C_ACCESS_CMD CmdType)
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XGIIOADDRESS pjIOPort, I2C_ACCESS_CMD CmdType)
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{
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PDEBUGI2C(ErrorF("EnableGPIOA()-pjIOPort=0x%x...\n", pjIOPort));
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@@ -134,7 +134,7 @@ PUCHAR pjIOPort, I2C_ACCESS_CMD CmdType)
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VOID
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EnableGPIOB(
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PUCHAR pjIOPort, I2C_ACCESS_CMD CmdType)
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XGIIOADDRESS pjIOPort, I2C_ACCESS_CMD CmdType)
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{
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UCHAR ujCR4A = XGI_GetReg(pjIOPort, IND_CR4A_GPIO_REG_III);
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@@ -152,7 +152,7 @@ PUCHAR pjIOPort, I2C_ACCESS_CMD CmdType)
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VOID
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EnableGPIOC(
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PUCHAR pjIOPort, I2C_ACCESS_CMD CmdType)
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XGIIOADDRESS pjIOPort, I2C_ACCESS_CMD CmdType)
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{
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UCHAR ujCR4A = XGI_GetReg(pjIOPort, IND_CR4A_GPIO_REG_III);
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@@ -1174,8 +1174,8 @@ UCHAR ReverseUCHAR(UCHAR data)
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*************************************************************************/
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VOID vWriteClockLineDVI(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data)
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{
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UCHAR temp;
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PUCHAR pjI2cIOBase;
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UCHAR temp;
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XGIIOADDRESS pjI2cIOBase;
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PDEBUGI2C(ErrorF("vWriteClockLineDVI()...begin\n"));
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@@ -1224,8 +1224,8 @@ VOID vWriteClockLineDVI(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data)
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*************************************************************************/
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VOID vWriteDataLineDVI(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data)
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{
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UCHAR temp;
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PUCHAR pjI2cIOBase;
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UCHAR temp;
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XGIIOADDRESS pjI2cIOBase;
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PDEBUGI2C(ErrorF("vWriteDataLineDVI()...begin\n"));
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@@ -1277,8 +1277,8 @@ VOID vWriteDataLineDVI(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data)
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*************************************************************************/
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BOOLEAN bReadClockLineDVI(PXGI_HW_DEVICE_INFO pHWDE)
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{
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UCHAR cPortData;
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PUCHAR pjI2cIOBase;
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UCHAR cPortData;
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XGIIOADDRESS pjI2cIOBase;
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PDEBUGI2C(ErrorF("bReadClockLineDVI()...begin\n"));
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@@ -1318,7 +1318,7 @@ BOOLEAN bReadClockLineDVI(PXGI_HW_DEVICE_INFO pHWDE)
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BOOLEAN bReadDataLineDVI(PXGI_HW_DEVICE_INFO pHWDE)
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{
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UCHAR cPortData;
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PUCHAR pjI2cIOBase;
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XGIIOADDRESS pjI2cIOBase;
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PDEBUGI2C(ErrorF("bReadDataLineDVI()...begin\n"));
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@@ -1357,7 +1357,7 @@ BOOLEAN bReadDataLineDVI(PXGI_HW_DEVICE_INFO pHWDE)
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//*************************************************************************//
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VOID vWaitForCRT1HsyncActive(PXGI_HW_DEVICE_INFO pHWDE)
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{
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PUCHAR pjPort = pHWDE->pjIOAddress + INPUT_STATUS_1_COLOR;
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XGIIOADDRESS pjPort = pHWDE->pjIOAddress + INPUT_STATUS_1_COLOR;
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ULONG i;
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for (i = 0; i < 0x00FFFF; i++)
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@@ -1398,7 +1398,7 @@ VOID vWaitForCRT1HsyncActive(PXGI_HW_DEVICE_INFO pHWDE)
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VOID vWriteClockLineCRT(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data)
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{
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UCHAR temp, ujSR1F;
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PUCHAR pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT;
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XGIIOADDRESS pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT;
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PDEBUGI2C(ErrorF("I2C:Write CRT clock = %x\n", data & 1));
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@@ -1433,7 +1433,7 @@ VOID vWriteClockLineCRT(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data)
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VOID vWriteDataLineCRT(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data)
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{
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UCHAR temp, ujSR1F;
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PUCHAR pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT;
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XGIIOADDRESS pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT;
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PDEBUGI2C(ErrorF("I2C:Write CRT data = %x\n", data & 1));
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@@ -1467,7 +1467,7 @@ VOID vWriteDataLineCRT(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data)
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BOOLEAN bReadClockLineCRT(PXGI_HW_DEVICE_INFO pHWDE)
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{
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UCHAR cPortData;
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PUCHAR pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT;
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XGIIOADDRESS pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT;
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cPortData = XGI_GetReg(pjI2cIOBase, IND_SR11_DDC_REG);
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cPortData = GETBITS(cPortData, 0:0);
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@@ -1489,7 +1489,7 @@ BOOLEAN bReadClockLineCRT(PXGI_HW_DEVICE_INFO pHWDE)
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BOOLEAN bReadDataLineCRT(PXGI_HW_DEVICE_INFO pHWDE)
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{
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UCHAR cPortData;
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PUCHAR pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT;
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XGIIOADDRESS pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT;
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cPortData = XGI_GetReg(pjI2cIOBase, IND_SR11_DDC_REG);
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cPortData = GETBITS(cPortData, 1:1);
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@@ -1517,7 +1517,7 @@ BOOLEAN bReadDataLineCRT(PXGI_HW_DEVICE_INFO pHWDE)
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VOID vWriteClockLineFCNT(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data)
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{
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UCHAR temp;
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PUCHAR pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT;
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XGIIOADDRESS pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT;
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PDEBUGI2C(ErrorF("I2C:Write FCNT clock = %x\n", data & 1));
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@@ -1541,7 +1541,7 @@ VOID vWriteClockLineFCNT(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data)
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VOID vWriteDataLineFCNT(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data)
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{
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UCHAR temp, temp2, temp3;
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PUCHAR pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT;
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XGIIOADDRESS pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT;
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PDEBUGI2C(ErrorF("I2C:Write FCNT data = %x\n", data & 1));
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@@ -1565,7 +1565,7 @@ VOID vWriteDataLineFCNT(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data)
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BOOLEAN bReadClockLineFCNT(PXGI_HW_DEVICE_INFO pHWDE)
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{
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UCHAR cPortData;
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PUCHAR pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT;
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XGIIOADDRESS pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT;
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cPortData = XGI_GetReg(pjI2cIOBase, IND_SR11_DDC_REG);
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cPortData = GETBITS(cPortData, 2:2);
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@@ -1587,7 +1587,7 @@ BOOLEAN bReadClockLineFCNT(PXGI_HW_DEVICE_INFO pHWDE)
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BOOLEAN bReadDataLineFCNT(PXGI_HW_DEVICE_INFO pHWDE)
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{
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UCHAR cPortData;
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PUCHAR pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT;
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XGIIOADDRESS pjI2cIOBase = pHWDE->pjIOAddress + SEQ_ADDRESS_PORT;
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cPortData = XGI_GetReg(pjI2cIOBase, IND_SR11_DDC_REG);
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cPortData = GETBITS(cPortData, 3:3);
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@@ -227,7 +227,7 @@ struct _XGI_HW_DEVICE_INFO
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ULONG ulVideoMemorySize; /* size, in bytes, of the memory on the board */
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PUCHAR pjIOAddress; /* base I/O address of VGA ports (0x3B0) */
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XGIIOADDRESS pjIOAddress; /* base I/O address of VGA ports (0x3B0) */
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PUCHAR pjCustomizedROMImage;
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