Move [HV]Total checks into S3VValidMode

Needed to build against Xorg 1.20 and later due to xorg/xserver@5a945f54
Based on ajax's commit xf86-video-rendition@70dd6c22

Signed-off-by: Alan Coopersmith <alan.coopersmith@oracle.com>
This commit is contained in:
Alan Coopersmith
2022-01-30 12:20:22 -08:00
parent f34dc6c0ff
commit 6c66938ca9

View File

@@ -1201,18 +1201,6 @@ S3VPreInit(ScrnInfoPtr pScrn, int flags)
vga256InfoRec.directMode = XF86DGADirectPresent;
#endif
/*
* xf86ValidateModes will check that the mode HTotal and VTotal values
* don't exceed the chipset's limit if pScrn->maxHValue and
* pScrn->maxVValue are set.
*/
/* todo - The virge limit is 2048 vertical & horizontal */
/* pixels, not clock register settings. */
/* true for all ViRGE? */
pScrn->maxHValue = 2048;
pScrn->maxVValue = 2048;
/* Lower depths default to config file */
pScrn->virtualX = pScrn->display->virtualX;
/* Adjust the virtualX to meet ViRGE hardware */
@@ -2564,6 +2552,15 @@ S3VValidMode(SCRN_ARG_TYPE arg, DisplayModePtr mode, Bool verbose, int flags)
if ((pScrn->bitsPerPixel + 7)/8 * mode->HDisplay > 4095)
return MODE_VIRTUAL_X;
/* todo - The virge limit is 2048 vertical & horizontal */
/* pixels, not clock register settings. */
/* true for all ViRGE? */
if (mode->HTotal > 2048)
return MODE_BAD_HVALUE;
if (mode->VTotal > 2048)
return MODE_BAD_VVALUE;
return MODE_OK;
}