Bug #19545: Add support for MCP7x-based integrated GPUs.

Based in part on an idea from Ben Skeggs.

Signed-off-by: Aaron Plattner <aplattner@nvidia.com>
Signed-off-by: Andy Ritger <aritger@nvidia.com>
Reviewed-by: Christian Zander <chzander@nvidia.com>
This commit is contained in:
Aaron Plattner
2010-03-03 20:29:55 -08:00
parent 49349f6e47
commit 9378ecd34a
3 changed files with 30 additions and 7 deletions

View File

@@ -59,8 +59,8 @@ NV40, NV41, NV43, NV44, NV45, C51
.B GeForce 7XXX
G70, G71, G72, G73
.TP 22
.B GeForce 8XXX, GeForce 9XXX
G80, G84, G86, G92, G94, G96, G98
.B GeForce 8XXX, GeForce 9XXX, GeForce G, ION
G80, G84, G86, G92, G94, G96, G98, GT215, GT216, GT218, MCP79, MCP7A
.TP 22
.B GeForce GTX
GT200
@@ -197,7 +197,7 @@ Authors include: David McKay, Jarno Paananen, Chas Inman, Dave Schmenk,
Mark Vojkovich, Aaron Plattner
.SH COPYRIGHT
.LP
Copyright (c) 2003 - 2008 NVIDIA, Corporation
Copyright (c) 2003-2008,2010 NVIDIA Corporation
.LP
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the

View File

@@ -614,9 +614,20 @@ G80InitHW(ScrnInfoPtr pScrn)
pNv->reg[0x00706454/4] = 0x00010000;
pNv->reg[0x00706460/4] = 0x0000502d;
pNv->reg[0x00706474/4] = 0x00010000;
pNv->reg[0x00706480/4] = 0x0019003d;
pNv->reg[0x00706484/4] = (pNv->videoRam << 10) - G80_RESERVED_VIDMEM;
pNv->reg[0x00706494/4] = 0x00010000;
if(pNv->architecture == 0xaa || pNv->architecture == 0xac) {
uint64_t base = pNv->reg[0x00100E10/4] << 12;
size_t size = pNv->reg[0x00100E14/4] << 12;
uint64_t limit = base + size - G80_RESERVED_VIDMEM;
pNv->reg[0x00706480/4] = 0x1a003d;
pNv->reg[0x00706484/4] = limit;
pNv->reg[0x00706488/4] = base;
pNv->reg[0x0070648c/4] = base >> 32 | ((limit >> 8) & 0xff000000);
} else {
pNv->reg[0x00706480/4] = 0x0019003d;
pNv->reg[0x00706484/4] = (pNv->videoRam << 10) - G80_RESERVED_VIDMEM;
pNv->reg[0x00706494/4] = 0x00010000;
}
pNv->reg[0x007064a0/4] = 0x0019003d;
pNv->reg[0x007064a4/4] = bar0_pramin + 0x1100f;
pNv->reg[0x007064a8/4] = bar0_pramin + 0x11000;

View File

@@ -1,4 +1,5 @@
/*
* Copyright 2010 NVIDIA Corporation
* Copyright 1996-1997 David J. McKay
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -124,7 +125,7 @@ _X_EXPORT DriverRec NV = {
#endif
};
/* Known cards as of 2009/05/15 */
/* Known cards as of 2010/03/03 */
static SymTabRec NVKnownChipsets[] =
{
@@ -495,6 +496,15 @@ static SymTabRec NVKnownChipsets[] =
{ 0x10DE06F9, "Quadro FX 370 LP" },
{ 0x10DE06FA, "Quadro NVS 450" },
{ 0x10DE06FD, "Quadro NVS 295" },
{ 0x10DE0861, "GeForce 9400" },
{ 0x10DE0862, "GeForce 9400M G" },
{ 0x10DE0863, "GeForce 9400M" },
{ 0x10DE086C, "GeForce 9300 / nForce 730i" },
{ 0x10DE0872, "GeForce G102M" },
{ 0x10DE0873, "GeForce G102M" },
{ 0x10DE087A, "GeForce 9400" },
{ 0x10DE087D, "ION" },
{ 0x10DE087F, "ION LE" },
{ 0x10DE0A20, "GeForce GT 220" },
{ 0x10DE0A23, "GeForce 210" },
{ 0x10DE0A2A, "GeForce GT 230M" },
@@ -753,6 +763,8 @@ NVIsG80(int chipType)
case 0x0650:
case 0x06e0:
case 0x06f0:
case 0x0860:
case 0x0870:
case 0x0a20:
case 0x0a30:
case 0x0a60: