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Remove DRI1 support.

Browse Source 
This was blocked on wide distribution of X Server 1.6 (now in the current or
next version of major distributions) and solutions for a couple of significant
architectural problems (vblank sync and frontbuffer rendering, which we now
have code or good plans for).

This includes disabling XVMC which is DRI1-only currently.
This commit is contained in:
Eric Anholt
2009-01-22 17:54:49 -08:00
parent 47591334a1
commit 30c226eeb3
9 changed files with 25 additions and 2087 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
configure.ac
View File

@@ -70,10 +70,10 @@ AC_ARG_ENABLE(video-debug, AC_HELP_STRING([--enable-video-debug],
[VIDEO_DEBUG="$enableval"],
[VIDEO_DEBUG=no])
AC_ARG_ENABLE(xvmc, AC_HELP_STRING([--disable-xvmc],
[Disable XvMC support [[default=auto]]]),
[XVMC="$enableval"],
[XVMC=auto])
dnl AC_ARG_ENABLE(xvmc, AC_HELP_STRING([--disable-xvmc],
dnl [Disable XvMC support [[default=auto]]]),
dnl [XVMC="$enableval"],
dnl [XVMC=auto])
# Checks for extensions
XORG_DRIVER_CHECK_EXT(XINERAMA, xineramaproto)

55
src/i830.h
View File

@@ -65,21 +65,18 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include <pciaccess.h>
#endif
#ifdef XF86DRI
#include "xf86drm.h"
#include "sarea.h"
#define _XF86DRI_SERVER_
#include "dri.h"
#include "GL/glxint.h"
#include "i830_dri.h"
#endif
#include "intel_bufmgr.h"
#include "i915_drm.h"
#ifdef I830_USE_EXA
#include "exa.h"
Bool I830EXAInit(ScreenPtr pScreen);
unsigned long long I830TexOffsetStart(PixmapPtr pPix);
#endif
#ifdef I830_USE_UXA
@@ -106,18 +103,6 @@ typedef struct _I830OutputRec I830OutputRec, *I830OutputPtr;
#include "i830_sdvo.h"
#include "i2c_vid.h"
/*
* The mode handling is based upon the VESA driver written by
* Paulo César Pereira de Andrade <pcpa@conectiva.com.br>.
*/
#ifdef XF86DRI
#define I830_MM_MINPAGES 512
#define I830_MM_MAXSIZE (32*1024)
#define I830_KERNEL_MM (1 << 0) /* Initialize the kernel memory manager*/
#define I830_KERNEL_TEX (1 << 1) /* Allocate texture memory pool */
#endif
#ifdef XvMCExtension
#ifdef ENABLE_XVMC
#define INTEL_XVMC 1
@@ -361,7 +346,6 @@ typedef enum accel_method {
enum dri_type {
DRI_DISABLED,
DRI_NONE,
DRI_XF86DRI,
DRI_DRI2
};
@@ -445,22 +429,10 @@ typedef struct _I830Rec {
i830_memory *power_context;
#ifdef XF86DRI
i830_memory *back_buffer;
i830_memory *depth_buffer;
i830_memory *textures; /**< Compatibility texture memory */
i830_memory *memory_manager; /**< DRI memory manager aperture */
i830_memory *hw_status; /* for G33 hw status page alloc */
int TexGranularity;
int drmMinor;
Bool allocate_classic_textures;
Bool can_resize;
Bool want_vblank_interrupts;
#endif
Bool need_mi_flush;
Bool tiling;
@@ -575,18 +547,9 @@ typedef struct _I830Rec {
enum dri_type directRenderingType; /* DRI enabled this generation. */
#ifdef XF86DRI
Bool directRenderingOpen;
int LockHeld;
DRIInfoPtr pDRIInfo;
int drmSubFD;
int numVisualConfigs;
__GLXvisualConfig *pVisualConfigs;
I830ConfigPrivPtr pVisualConfigsPriv;
drm_handle_t buffer_map;
drm_handle_t ring_map;
char deviceName[64];
#endif
/* Broken-out options. */
OptionInfoPtr Options;
@@ -779,26 +742,8 @@ i830_pipe_a_require_activate (ScrnInfoPtr scrn);
void
i830_pipe_a_require_deactivate (ScrnInfoPtr scrn);
#ifdef XF86DRI
extern Bool I830Allocate3DMemory(ScrnInfoPtr pScrn, const int flags);
extern void I830SetupMemoryTiling(ScrnInfoPtr pScrn);
extern Bool I830DRIScreenInit(ScreenPtr pScreen);
extern Bool I830DRIDoMappings(ScreenPtr pScreen);
extern Bool I830DRIResume(ScreenPtr pScreen);
extern void I830DRICloseScreen(ScreenPtr pScreen);
extern Bool I830DRIFinishScreenInit(ScreenPtr pScreen);
extern void I830DRIUnlock(ScrnInfoPtr pScrn);
extern Bool I830DRILock(ScrnInfoPtr pScrn);
extern Bool I830DRISetVBlankInterrupt (ScrnInfoPtr pScrn, Bool on);
extern Bool i830_update_dri_buffers(ScrnInfoPtr pScrn);
extern Bool I830DRISetHWS(ScrnInfoPtr pScrn);
extern Bool I830DRIInstIrqHandler(ScrnInfoPtr pScrn);
#endif
#ifdef DRI2
Bool I830DRI2ScreenInit(ScreenPtr pScreen);
void I830DRI2CloseScreen(ScreenPtr pScreen);
#endif
#ifdef XF86DRM_MODE
extern Bool drmmode_pre_init(ScrnInfoPtr pScrn, int fd, int cpp);

43
src/i830_accel.c
View File

@@ -137,12 +137,6 @@ I830WaitLpRing(ScrnInfoPtr pScrn, int n, int timeout_millis)
else
i830_dump_error_state(pScrn);
ErrorF("space: %d wanted %d\n", ring->space, n);
#ifdef XF86DRI
if (pI830->directRenderingType == DRI_XF86DRI) {
DRIUnlock(screenInfo.screens[pScrn->scrnIndex]);
DRICloseScreen(screenInfo.screens[pScrn->scrnIndex]);
}
#endif
#ifdef I830_USE_XAA
pI830->AccelInfoRec = NULL; /* Stops recursive behavior */
#endif
@@ -180,14 +174,6 @@ I830Sync(ScrnInfoPtr pScrn)
if (pI830->accel == ACCEL_NONE || !pScrn->vtSema || !pI830->batch_bo)
return;
#ifdef XF86DRI
/* VT switching tries to do this.
*/
if (!pI830->LockHeld && pI830->directRenderingType == DRI_XF86DRI) {
return;
}
#endif
I830EmitFlush(pScrn);
intel_batch_flush(pScrn, TRUE);
@@ -241,35 +227,6 @@ I830EmitFlush(ScrnInfoPtr pScrn)
}
}
Bool
I830SelectBuffer(ScrnInfoPtr pScrn, int buffer)
{
I830Ptr pI830 = I830PTR(pScrn);
switch (buffer) {
#ifdef XF86DRI
case I830_SELECT_BACK:
pI830->bufferOffset = pI830->back_buffer->offset;
if (pI830->back_buffer->tiling == TILE_YMAJOR)
return FALSE;
break;
case I830_SELECT_DEPTH:
pI830->bufferOffset = pI830->depth_buffer->offset;
if (pI830->depth_buffer->tiling == TILE_YMAJOR)
return FALSE;
break;
#endif
default:
case I830_SELECT_FRONT:
pI830->bufferOffset = pScrn->fbOffset;
break;
}
if (I810_DEBUG & DEBUG_VERBOSE_ACCEL)
ErrorF("I830SelectBuffer %d --> offset %x\n",
buffer, pI830->bufferOffset);
return TRUE;
}
#if (ALWAYS_SYNC || ALWAYS_FLUSH)
void

77
src/i830_display.c
View File

@@ -698,7 +698,6 @@ i830PipeSetBase(xf86CrtcPtr crtc, int x, int y)
ScrnInfoPtr pScrn = crtc->scrn;
I830Ptr pI830 = I830PTR(pScrn);
I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
int pipe = intel_crtc->pipe;
int plane = intel_crtc->plane;
unsigned long Start, Offset, Stride;
int dspbase = (plane == 0 ? DSPABASE : DSPBBASE);
@@ -737,30 +736,6 @@ i830PipeSetBase(xf86CrtcPtr crtc, int x, int y)
OUTREG(dspbase, Start + Offset);
POSTING_READ(dspbase);
}
#ifdef XF86DRI
if (pI830->directRenderingType == DRI_XF86DRI) {
drmI830Sarea *sPriv = (drmI830Sarea *) DRIGetSAREAPrivate(pScrn->pScreen);
if (!sPriv)
return;
switch (pipe) {
case 0:
sPriv->pipeA_x = x;
sPriv->pipeA_y = y;
break;
case 1:
sPriv->pipeB_x = x;
sPriv->pipeB_y = y;
break;
default:
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Can't update pipe %d in SAREA\n", pipe);
break;
}
}
#endif
}
/*
@@ -1062,7 +1037,7 @@ i830_use_fb_compression(xf86CrtcPtr crtc)
return TRUE;
}
#if defined(DRM_IOCTL_MODESET_CTL) && (defined(XF86DRI) || defined(DRI2))
#if defined(DRM_IOCTL_MODESET_CTL)
static void i830_modeset_ctl(xf86CrtcPtr crtc, int pre)
{
ScrnInfoPtr pScrn = crtc->scrn;
@@ -1094,7 +1069,7 @@ static void i830_modeset_ctl(xf86CrtcPtr crtc, int dpms_state)
{
return;
}
#endif /* DRM_IOCTL_MODESET_CTL && (XF86DRI || DRI2) */
#endif /* DRM_IOCTL_MODESET_CTL */
static void
i830_disable_vga_plane (xf86CrtcPtr crtc)
@@ -1286,54 +1261,20 @@ i830_crtc_dpms(xf86CrtcPtr crtc, int mode)
}
intel_crtc->dpms_mode = mode;
#ifdef XF86DRI
if (pI830->directRenderingType == DRI_XF86DRI) {
drmI830Sarea *sPriv = (drmI830Sarea *) DRIGetSAREAPrivate(pScrn->pScreen);
Bool enabled = crtc->enabled && mode != DPMSModeOff;
I830DRISetVBlankInterrupt (pScrn, TRUE);
if (!sPriv)
return;
switch (pipe) {
case 0:
sPriv->pipeA_w = enabled ? crtc->mode.HDisplay : 0;
sPriv->pipeA_h = enabled ? crtc->mode.VDisplay : 0;
break;
case 1:
sPriv->pipeB_w = enabled ? crtc->mode.HDisplay : 0;
sPriv->pipeB_h = enabled ? crtc->mode.VDisplay : 0;
break;
default:
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Can't update pipe %d in SAREA\n", pipe);
break;
}
}
#endif
}
static Bool
i830_crtc_lock (xf86CrtcPtr crtc)
{
/* Sync the engine before mode switch */
i830WaitSync(crtc->scrn);
/* Sync the engine before mode switch */
i830WaitSync(crtc->scrn);
#ifdef XF86DRI
return I830DRILock(crtc->scrn);
#else
return FALSE;
#endif
}
static void
i830_crtc_unlock (xf86CrtcPtr crtc)
{
#ifdef XF86DRI
I830DRIUnlock (crtc->scrn);
#endif
}
static void
@@ -1368,11 +1309,6 @@ i830_crtc_commit (xf86CrtcPtr crtc)
/* Reenable FB compression if possible */
if (i830_use_fb_compression(crtc))
i830_enable_fb_compression(crtc);
#ifdef XF86DRI
/* Tell DRI1 the news about new output config */
i830_update_dri_buffers(crtc->scrn);
#endif
}
void
@@ -1919,10 +1855,7 @@ i830_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
OUTREG(dspcntr_reg, dspcntr);
/* Flush the plane changes */
i830PipeSetBase(crtc, x, y);
#ifdef XF86DRI
I830DRISetVBlankInterrupt (pScrn, TRUE);
#endif
i830WaitForVblank(pScrn);
}

1438
src/i830_dri.c
View File

File diff suppressed because it is too large Load Diff

191
src/i830_driver.c
View File

@@ -206,11 +206,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "i830_hwmc.h"
#endif
#ifdef XF86DRI
#include "dri.h"
#include <sys/ioctl.h>
#include "i915_drm.h"
#endif
#ifdef XF86DRM_MODE
#include <xf86drmMode.h>
@@ -1624,7 +1621,6 @@ I830AccelMethodInit(ScrnInfoPtr pScrn)
if (!xf86ReturnOptValBool(pI830->Options, OPTION_DRI, TRUE))
pI830->directRenderingType = DRI_DISABLED;
#ifdef XF86DRI
if (pI830->accel == ACCEL_NONE) {
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "DRI is disabled because it "
"needs 2D acceleration.\n");
@@ -1634,7 +1630,6 @@ I830AccelMethodInit(ScrnInfoPtr pScrn)
"runs only at depths 16 and 24.\n");
pI830->directRenderingType = DRI_DISABLED;
}
#endif /* XF86DRI */
I830MapMMIO(pScrn);
@@ -1664,12 +1659,8 @@ I830AccelMethodInit(ScrnInfoPtr pScrn)
SaveHWState(pScrn);
pI830->can_resize = FALSE;
if (pI830->accel == ACCEL_UXA && pI830->directRenderingType != DRI_XF86DRI)
if (pI830->accel == ACCEL_UXA)
pI830->can_resize = TRUE;
#if !defined(DRI2) && defined(XF86DRI)
/* Disable resizing so that DRI1 can initialize and give us GEM support. */
pI830->can_resize = FALSE;
#endif
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Resizable framebuffer: %s (%d %d)\n",
@@ -1711,7 +1702,7 @@ I830DrmModeInit(ScrnInfoPtr pScrn)
}
pI830->can_resize = FALSE;
if (pI830->accel == ACCEL_UXA && pI830->directRenderingType != DRI_XF86DRI)
if (pI830->accel == ACCEL_UXA)
pI830->can_resize = TRUE;
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
@@ -1741,7 +1732,6 @@ I830DrmModeInit(ScrnInfoPtr pScrn)
}
pI830->directRenderingType = DRI_NONE;
pI830->allocate_classic_textures = FALSE;
i830_init_bufmgr(pScrn);
#endif
@@ -1973,23 +1963,11 @@ I830PreInit(ScrnInfoPtr pScrn, int flags)
xf86SetOperatingState(resVgaMem, pI830->pEnt->index, ResDisableOpr);
}
#if defined(XF86DRI)
/* Load the dri module if requested. */
if (xf86ReturnOptValBool(pI830->Options, OPTION_DRI, FALSE) &&
pI830->directRenderingType != DRI_DISABLED) {
if (xf86LoadSubModule(pScrn, "dri")) {
xf86LoaderReqSymLists(I810driSymbols, I810drmSymbols, NULL);
}
}
#endif
#if defined(DRI2)
/* Load the dri2 module if requested. */
if (xf86ReturnOptValBool(pI830->Options, OPTION_DRI, FALSE) &&
pI830->directRenderingType != DRI_DISABLED) {
xf86LoadSubModule(pScrn, "dri2");
}
#endif
pI830->preinit = FALSE;
@@ -2265,9 +2243,6 @@ RestoreHWState(ScrnInfoPtr pScrn)
DPRINTF(PFX, "RestoreHWState\n");
#ifdef XF86DRI
I830DRISetVBlankInterrupt (pScrn, FALSE);
#endif
/* Disable outputs */
for (i = 0; i < xf86_config->num_output; i++) {
xf86OutputPtr output = xf86_config->output[i];
@@ -2579,16 +2554,6 @@ IntelEmitInvarientState(ScrnInfoPtr pScrn)
if (pI830->accel == ACCEL_NONE)
return;
#ifdef XF86DRI
if (pI830->directRenderingType == DRI_XF86DRI) {
drmI830Sarea *sarea = DRIGetSAREAPrivate(pScrn->pScreen);
/* Mark that the X Server was the last holder of the context */
if (sarea)
sarea->ctxOwner = DRIGetContext(pScrn->pScreen);
}
#endif
/* If we've emitted our state since the last clobber by another client,
* skip it.
*/
@@ -2635,10 +2600,8 @@ I830BlockHandler(int i,
* fashion.
*/
intel_batch_flush(pScrn, flushed);
#ifdef XF86DRI
if (pI830->memory_manager)
drmCommandNone(pI830->drmSubFD, DRM_I915_GEM_THROTTLE);
#endif
pI830->need_mi_flush = FALSE;
}
@@ -2700,7 +2663,6 @@ i830_try_memory_allocation(ScrnInfoPtr pScrn)
{
I830Ptr pI830 = I830PTR(pScrn);
Bool tiled = pI830->tiling;
Bool xf86dri = pI830->directRenderingType == DRI_XF86DRI;
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Attempting memory allocation with %stiled buffers.\n",
@@ -2713,9 +2675,6 @@ i830_try_memory_allocation(ScrnInfoPtr pScrn)
if (!i830_allocate_pwrctx(pScrn))
goto failed;
if (xf86dri && !i830_allocate_3d_memory(pScrn))
goto failed;
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "%siled allocation successful.\n",
tiled ? "T" : "Unt");
return TRUE;
@@ -2780,18 +2739,6 @@ i830_memory_init(ScrnInfoPtr pScrn)
"disabled\n");
pI830->fb_compression = FALSE;
/* Try again, but leave DRI enabled */
if (pI830->directRenderingType == DRI_XF86DRI) {
if (i830_try_memory_allocation(pScrn))
return TRUE;
else {
i830_reset_allocations(pScrn);
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Couldn't allocate 3D memory, "
"disabling DRI.\n");
pI830->directRenderingType = DRI_NONE;
}
}
if (i830_try_memory_allocation(pScrn))
return TRUE;
@@ -2901,9 +2848,7 @@ I830SwapPipes(ScrnInfoPtr pScrn)
* alone in that case.
* Also make sure the DRM can handle the swap.
*/
if (I830LVDSPresent(pScrn) && !IS_I965GM(pI830) && !IS_GM45(pI830) &&
(pI830->directRenderingType != DRI_XF86DRI ||
(pI830->directRenderingType == DRI_XF86DRI && pI830->drmMinor >= 10))) {
if (I830LVDSPresent(pScrn) && !IS_I965GM(pI830) && !IS_GM45(pI830)) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "adjusting plane->pipe mappings "
"to allow for framebuffer compression\n");
for (c = 0; c < config->num_crtc; c++) {
@@ -3008,14 +2953,6 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
pI830->directRenderingType = DRI_DRI2;
#endif
#ifdef XF86DRI
/* If DRI hasn't been explicitly disabled, try to initialize it.
* It will be used by the memory allocator.
*/
if (!pI830->can_resize && pI830->directRenderingType == DRI_NONE && I830DRIScreenInit(pScreen))
pI830->directRenderingType = DRI_XF86DRI;
#endif
/* Enable tiling by default */
pI830->tiling = TRUE;
@@ -3115,32 +3052,8 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
}
i830_init_bufmgr(pScrn);
#ifdef XF86DRI
/*
* Setup DRI after visuals have been established, but before fbScreenInit
* is called. fbScreenInit will eventually call into the drivers
* InitGLXVisuals call back.
*/
if (pI830->directRenderingType == DRI_XF86DRI) {
if (pI830->accel == ACCEL_NONE) {
xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "DRI is disabled because it "
"needs 2D acceleration.\n");
pI830->directRenderingType = DRI_NONE;
}
}
if (pI830->directRenderingType == DRI_XF86DRI &&
!I830DRIDoMappings(pScreen))
pI830->directRenderingType = DRI_NONE;
/* If we failed for any reason, free DRI memory. */
if (pI830->directRenderingType != DRI_XF86DRI &&
pI830->back_buffer != NULL)
i830_free_3d_memory(pScrn);
if (!pI830->use_drm_mode)
I830SwapPipes(pScrn);
#endif
pScrn->fbOffset = pI830->front_buffer->offset;
@@ -3219,15 +3132,6 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Hardware cursor initialization failed\n");
#ifdef XF86DRI
/* Must be called before EnterVT, so we can acquire the DRI lock when
* binding our memory.
*/
if (pI830->directRenderingType == DRI_XF86DRI &&
!I830DRIFinishScreenInit(pScreen))
pI830->directRenderingType = DRI_NONE;
#endif
/* Must force it before EnterVT, so we are in control of VT and
* later memory should be bound when allocating, e.g rotate_mem */
pScrn->vtSema = TRUE;
@@ -3263,9 +3167,8 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
#ifdef I830_XV
#ifdef INTEL_XVMC
pI830->XvMCEnabled = FALSE;
from = (pI830->directRenderingType == DRI_XF86DRI &&
xf86GetOptValBool(pI830->Options, OPTION_XVMC,
&pI830->XvMCEnabled)) ? X_CONFIG : X_DEFAULT;
from = xf86GetOptValBool(pI830->Options, OPTION_XVMC,
&pI830->XvMCEnabled) ? X_CONFIG : X_DEFAULT;
xf86DrvMsg(pScrn->scrnIndex, from, "Intel XvMC decoder %sabled\n",
pI830->XvMCEnabled ? "en" : "dis");
#endif
@@ -3277,13 +3180,8 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
/* Setup 3D engine, needed for rotation too */
IntelEmitInvarientState(pScrn);
#if defined(XF86DRI) || defined(DRI2)
#if defined(DRI2)
switch (pI830->directRenderingType) {
case DRI_XF86DRI:
pI830->directRenderingOpen = TRUE;
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"direct rendering: XF86DRI Enabled\n");
break;
case DRI_DRI2:
pI830->directRenderingOpen = TRUE;
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "direct rendering: DRI2 Enabled\n");
@@ -3374,17 +3272,6 @@ I830LeaveVT(int scrnIndex, int flags)
i830SetHotkeyControl(pScrn, HOTKEY_BIOS_SWITCH);
#ifdef XF86DRI
if (pI830->directRenderingOpen &&
pI830->directRenderingType == DRI_XF86DRI) {
DRILock(screenInfo.screens[pScrn->scrnIndex], 0);
if (!pI830->memory_manager) {
I830DRISetVBlankInterrupt (pScrn, FALSE);
drmCtlUninstHandler(pI830->drmSubFD);
}
}
#endif
#ifndef HAVE_FREE_SHADOW
for (o = 0; o < config->num_crtc; o++) {
@@ -3426,7 +3313,6 @@ I830LeaveVT(int scrnIndex, int flags)
i830_unbind_all_memory(pScrn);
#ifdef XF86DRI
if (pI830->memory_manager && !pI830->use_drm_mode) {
int ret;
@@ -3437,7 +3323,6 @@ I830LeaveVT(int scrnIndex, int flags)
if (ret != 0)
FatalError("DRM_I915_LEAVEVT failed: %s\n", strerror(ret));
}
#endif /* XF86DRI */
if ((pI830->accel == ACCEL_EXA || pI830->accel == ACCEL_UXA) && IS_I965G(pI830))
gen4_render_state_cleanup(pScrn);
@@ -3445,12 +3330,10 @@ I830LeaveVT(int scrnIndex, int flags)
if (pI830->AccelInfoRec)
pI830->AccelInfoRec->NeedToSync = FALSE;
#ifdef XF86DRI
ret = drmDropMaster(pI830->drmSubFD);
if (ret)
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"drmDropMaster failed: %s\n", strerror(errno));
#endif
}
/*
@@ -3466,7 +3349,6 @@ I830EnterVT(int scrnIndex, int flags)
DPRINTF(PFX, "Enter VT\n");
#ifdef XF86DRI
ret = drmSetMaster(pI830->drmSubFD);
if (ret) {
if (errno == EINVAL) {
@@ -3478,7 +3360,6 @@ I830EnterVT(int scrnIndex, int flags)
"drmSetMaster failed: %s\n", strerror(errno));
}
}
#endif
/*
* Only save state once per server generation since that's what most
@@ -3512,7 +3393,6 @@ I830EnterVT(int scrnIndex, int flags)
if (!pI830->use_drm_mode)
i830_disable_render_standby(pScrn);
#ifdef XF86DRI
if (pI830->memory_manager && !pI830->use_drm_mode) {
int ret;
@@ -3523,7 +3403,6 @@ I830EnterVT(int scrnIndex, int flags)
if (ret != 0)
FatalError("DRM_I915_ENTERVT failed: %s\n", strerror(ret));
}
#endif /* XF86DRI */
if (!i830_bind_all_memory(pScrn))
return FALSE;
@@ -3575,54 +3454,6 @@ I830EnterVT(int scrnIndex, int flags)
i830DescribeOutputConfiguration(pScrn);
}
#ifdef XF86DRI
if (pI830->directRenderingType == DRI_XF86DRI) {
/* HW status is fixed, we need to set it up before any drm
* operation which accessing that page, like irq install, etc.
*/
if (pI830->starting && !pI830->memory_manager) {
if (pI830->hw_status != NULL && !I830DRISetHWS(pScrn)) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Fail to setup hardware status page.\n");
I830DRICloseScreen(pScrn->pScreen);
return FALSE;
}
if (!pI830->memory_manager && !I830DRIInstIrqHandler(pScrn)) {
I830DRICloseScreen(pScrn->pScreen);
return FALSE;
}
}
/* Update buffer offsets in sarea and mappings, since buffer offsets
* may have changed.
*/
if (!i830_update_dri_buffers(pScrn))
FatalError("i830_update_dri_buffers() failed\n");
I830DRISetVBlankInterrupt (pScrn, TRUE);
if (!pI830->starting) {
ScreenPtr pScreen = pScrn->pScreen;
drmI830Sarea *sarea = (drmI830Sarea *) DRIGetSAREAPrivate(pScreen);
int i;
I830DRIResume(screenInfo.screens[scrnIndex]);
if (!pI830->memory_manager)
i830_refresh_ring(pScrn);
I830Sync(pScrn);
sarea->texAge++;
for(i = 0; i < I830_NR_TEX_REGIONS+1 ; i++)
sarea->texList[i].age = sarea->texAge;
DPRINTF(PFX, "calling dri unlock\n");
DRIUnlock(screenInfo.screens[pScrn->scrnIndex]);
}
pI830->LockHeld = 0;
}
#endif
/* Set the hotkey to just notify us. We could check its results
* periodically and attempt to do something, but it seems like we basically
* never get results when we should, and this should all be better handled
@@ -3717,20 +3548,10 @@ I830CloseScreen(int scrnIndex, ScreenPtr pScreen)
dri_bufmgr_destroy(pI830->bufmgr);
pI830->bufmgr = NULL;
#ifdef XF86DRI
if (pI830->directRenderingOpen &&
pI830->directRenderingType == DRI_XF86DRI) {
pI830->directRenderingOpen = FALSE;
I830DRICloseScreen(pScreen);
}
#endif
#ifdef DRI2
if (pI830->directRenderingOpen && pI830->directRenderingType == DRI_DRI2) {
pI830->directRenderingOpen = FALSE;
I830DRI2CloseScreen(pScreen);
}
#endif
xf86GARTCloseScreen(scrnIndex);

20
src/i830_exa.c
View File

@@ -737,8 +737,6 @@ I830EXAInit(ScreenPtr pScreen)
}
}
I830SelectBuffer(pScrn, I830_SELECT_FRONT);
return TRUE;
}
@@ -1043,26 +1041,8 @@ i830_uxa_init (ScreenPtr pScreen)
pScreen->CreatePixmap = i830_uxa_create_pixmap;
pScreen->DestroyPixmap = i830_uxa_destroy_pixmap;
I830SelectBuffer(scrn, I830_SELECT_FRONT);
uxa_set_fallback_debug(pScreen, i830->fallback_debug);
return TRUE;
}
#endif /* I830_USE_UXA */
#ifdef XF86DRI
#ifndef ExaOffscreenMarkUsed
extern void ExaOffscreenMarkUsed(PixmapPtr);
#endif
unsigned long long
I830TexOffsetStart(PixmapPtr pPix)
{
exaMoveInPixmap(pPix);
ExaOffscreenMarkUsed(pPix);
return exaGetPixmapOffset(pPix);
}
#endif

246
src/i830_memory.c
View File

@@ -107,9 +107,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "i830.h"
#include "i810_reg.h"
#ifdef XF86DRI
#include "i915_drm.h"
#endif
#define ALIGN(i,m) (((i) + (m) - 1) & ~((m) - 1))
@@ -225,7 +223,6 @@ i830_bind_memory(ScrnInfoPtr pScrn, i830_memory *mem)
if (mem == NULL || mem->bound)
return TRUE;
#ifdef XF86DRI
if (mem->bo != NULL) {
if (dri_bo_pin(mem->bo, mem->alignment) != 0) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
@@ -238,7 +235,6 @@ i830_bind_memory(ScrnInfoPtr pScrn, i830_memory *mem)
mem->offset = mem->bo->offset;
mem->end = mem->offset + mem->size;
}
#endif
if (!mem->bound) {
if (!pI830->gtt_acquired)
@@ -274,7 +270,6 @@ i830_unbind_memory(ScrnInfoPtr pScrn, i830_memory *mem)
!pI830->kernel_exec_fencing)
i830_clear_tiling(pScrn, mem->fence_nr);
#ifdef XF86DRI
if (mem->bo != NULL) {
if (dri_bo_unpin(mem->bo) == 0) {
mem->bound = FALSE;
@@ -286,7 +281,6 @@ i830_unbind_memory(ScrnInfoPtr pScrn, i830_memory *mem)
return FALSE;
}
}
#endif
if (mem->key == -1 || xf86UnbindGARTMemory(pScrn->scrnIndex, mem->key)) {
mem->bound = FALSE;
@@ -305,7 +299,6 @@ i830_free_memory(ScrnInfoPtr pScrn, i830_memory *mem)
/* Free any AGP memory. */
i830_unbind_memory(pScrn, mem);
#ifdef XF86DRI
if (mem->bo != NULL) {
I830Ptr pI830 = I830PTR(pScrn);
dri_bo_unreference (mem->bo);
@@ -323,7 +316,6 @@ i830_free_memory(ScrnInfoPtr pScrn, i830_memory *mem)
xfree(mem);
return;
}
#endif
/* Disconnect from the list of allocations */
if (mem->prev != NULL)
mem->prev->next = mem->next;
@@ -352,14 +344,12 @@ i830_reset_allocations(ScrnInfoPtr pScrn)
while (pI830->memory_list->next->next != NULL) {
i830_memory *mem = pI830->memory_list->next;
#ifdef XF86DRI
/* Don't reset BO allocator, which we set up at init. */
if (pI830->memory_manager == mem) {
mem = mem->next;
if (mem->next == NULL)
break;
}
#endif
i830_free_memory(pScrn, mem);
}
@@ -383,30 +373,10 @@ i830_reset_allocations(ScrnInfoPtr pScrn)
pI830->exa_offscreen = NULL;
pI830->overlay_regs = NULL;
pI830->power_context = NULL;
#ifdef XF86DRI
pI830->back_buffer = NULL;
pI830->depth_buffer = NULL;
pI830->textures = NULL;
#endif
pI830->ring.mem = NULL;
pI830->fake_bufmgr_mem = NULL;
}
void
i830_free_3d_memory(ScrnInfoPtr pScrn)
{
I830Ptr pI830 = I830PTR(pScrn);
#ifdef XF86DRI
i830_free_memory(pScrn, pI830->back_buffer);
pI830->back_buffer = NULL;
i830_free_memory(pScrn, pI830->depth_buffer);
pI830->depth_buffer = NULL;
i830_free_memory(pScrn, pI830->textures);
pI830->textures = NULL;
#endif
}
/**
* Initialize's the driver's video memory allocator to allocate in the
* given range.
@@ -421,13 +391,9 @@ i830_allocator_init(ScrnInfoPtr pScrn, unsigned long offset, unsigned long size)
{
I830Ptr pI830 = I830PTR(pScrn);
i830_memory *start, *end;
#ifdef XF86DRI
int dri_major, dri_minor, dri_patch;
struct drm_i915_getparam gp;
struct drm_i915_setparam sp;
int has_gem;
int has_dri;
#endif
start = xcalloc(1, sizeof(*start));
if (start == NULL)
@@ -464,18 +430,9 @@ i830_allocator_init(ScrnInfoPtr pScrn, unsigned long offset, unsigned long size)
pI830->memory_list = start;
#ifdef XF86DRI
has_gem = FALSE;
has_dri = FALSE;
if (pI830->directRenderingType == DRI_XF86DRI &&
xf86LoaderCheckSymbol ("DRIQueryVersion"))
{
DRIQueryVersion(&dri_major, &dri_minor, &dri_patch);
has_dri = TRUE;
}
if (pI830->directRenderingType >= DRI_XF86DRI)
if (pI830->directRenderingType >= DRI_DRI2)
{
has_gem = FALSE;
gp.param = I915_PARAM_HAS_GEM;
@@ -490,10 +447,7 @@ i830_allocator_init(ScrnInfoPtr pScrn, unsigned long offset, unsigned long size)
* 5.4 or newer so we can rely on the lock being held after DRIScreenInit,
* rather than after DRIFinishScreenInit.
*/
if ((pI830->directRenderingType == DRI_XF86DRI && has_gem && has_dri &&
(dri_major > 5 || (dri_major == 5 && dri_minor >= 4))) ||
(pI830->directRenderingType == DRI_DRI2 && has_gem))
{
if (pI830->directRenderingType == DRI_DRI2 && has_gem) {
int mmsize;
/* Take over all of the graphics aperture minus enough to for
@@ -562,10 +516,7 @@ i830_allocator_init(ScrnInfoPtr pScrn, unsigned long offset, unsigned long size)
i830_free_memory(pScrn, pI830->memory_manager);
pI830->memory_manager = NULL;
}
} else {
pI830->allocate_classic_textures = TRUE;
}
#endif /* XF86DRI */
return TRUE;
}
@@ -580,7 +531,6 @@ i830_allocator_fini(ScrnInfoPtr pScrn)
/* The memory manager is more special */
if (pI830->memory_manager) {
/* XXX drmMMTakedown(pI830->drmSubFD, DRM_BO_MEM_TT);*/
i830_free_memory(pScrn, pI830->memory_manager);
pI830->memory_manager = NULL;
}
@@ -798,7 +748,6 @@ i830_allocate_agp_memory(ScrnInfoPtr pScrn, i830_memory *mem, int flags)
return TRUE;
}
#ifdef XF86DRI
static i830_memory *
i830_allocate_memory_bo(ScrnInfoPtr pScrn, const char *name,
unsigned long size, unsigned long pitch,
@@ -886,7 +835,6 @@ i830_allocate_memory_bo(ScrnInfoPtr pScrn, const char *name,
return mem;
}
#endif /* XF86DRI */
/* Allocates video memory at the given size, pitch, alignment and tile format.
*
@@ -913,9 +861,7 @@ i830_allocate_memory(ScrnInfoPtr pScrn, const char *name,
enum tile_format tile_format)
{
i830_memory *mem;
#ifdef XF86DRI
I830Ptr pI830 = I830PTR(pScrn);
#endif
/* Manage tile alignment and size constraints */
if (tile_format != TILE_NONE) {
@@ -935,14 +881,12 @@ i830_allocate_memory(ScrnInfoPtr pScrn, const char *name,
size = i830_get_fence_size(pI830, size);
alignment = i830_get_fence_alignment(pI830, size);
}
#ifdef XF86DRI
if (pI830->use_drm_mode || (pI830->memory_manager &&
!(flags & NEED_PHYSICAL_ADDR) &&
!(flags & NEED_LIFETIME_FIXED)))
{
return i830_allocate_memory_bo(pScrn, name, size, pitch, alignment, flags, tile_format);
} else
#endif /* XF86DRI */
{
mem = i830_allocate_aperture(pScrn, name, size, pitch, alignment, flags, tile_format);
if (mem == NULL)
@@ -1517,167 +1461,6 @@ i830_allocate_2d_memory(ScrnInfoPtr pScrn)
return TRUE;
}
#ifdef XF86DRI
static unsigned int
myLog2(unsigned int n)
{
unsigned int log2 = 1;
while (n > 1) {
n >>= 1;
log2++;
}
return log2;
}
static Bool
i830_allocate_backbuffer(ScrnInfoPtr pScrn, i830_memory **buffer,
const char *name)
{
I830Ptr pI830 = I830PTR(pScrn);
unsigned int pitch = pScrn->displayWidth * pI830->cpp;
unsigned long size;
int height;
enum tile_format tile_format = TILE_NONE;;
if (pI830->rotation & (RR_Rotate_0 | RR_Rotate_180))
height = pScrn->virtualY;
else
height = pScrn->virtualX;
/* Try to allocate on the best tile-friendly boundaries. */
if (pI830->tiling && IsTileable(pScrn, pitch))
{
size = ROUND_TO_PAGE(pitch * ALIGN(height, 16));
tile_format = TILE_XMAJOR;
}
else
{
size = ROUND_TO_PAGE(pitch * height);
tile_format = TILE_NONE;
}
*buffer = i830_allocate_memory(pScrn, name, size, pitch,
GTT_PAGE_SIZE,
ALIGN_BOTH_ENDS |
ALLOW_SHARING,
tile_format);
if (*buffer == NULL) {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Failed to allocate %s space.\n", name);
return FALSE;
}
return TRUE;
}
static Bool
i830_allocate_depthbuffer(ScrnInfoPtr pScrn)
{
I830Ptr pI830 = I830PTR(pScrn);
unsigned long size;
unsigned int pitch = pScrn->displayWidth * pI830->cpp;
int height;
int flags;
enum tile_format tile_format = TILE_NONE;
height = pScrn->virtualY;
/* First try allocating it tiled */
flags = ALLOW_SHARING;
if (pI830->tiling && IsTileable(pScrn, pitch))
{
/* The 965 requires that the depth buffer be in Y Major format, while
* the rest appear to fail when handed that format.
*/
tile_format = IS_I965G(pI830) ? TILE_YMAJOR: TILE_XMAJOR;
height = ALIGN(height, 16);
flags |= ALIGN_BOTH_ENDS;
}
size = ROUND_TO_PAGE(pitch * height);
pI830->depth_buffer =
i830_allocate_memory(pScrn, "depth buffer", size, pitch,
GTT_PAGE_SIZE, flags, tile_format);
if (pI830->depth_buffer == NULL) {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Failed to allocate depth buffer space.\n");
return FALSE;
}
return TRUE;
}
static Bool
i830_allocate_texture_memory(ScrnInfoPtr pScrn)
{
I830Ptr pI830 = I830PTR(pScrn);
unsigned long size;
int i;
if (pI830->allocate_classic_textures) {
/* XXX: auto-sizing */
size = MB(32);
i = myLog2(size / I830_NR_TEX_REGIONS);
if (i < I830_LOG_MIN_TEX_REGION_SIZE)
i = I830_LOG_MIN_TEX_REGION_SIZE;
pI830->TexGranularity = i;
/* Truncate size */
size >>= i;
size <<= i;
if (size < KB(512)) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Less than 512 kBytes for texture space (real %ld"
"kBytes).\n",
size / 1024);
return FALSE;
}
/* Now that the DRM uses the sarea to get the offsets of the buffers,
* and we update the classic DRM mappings and the sarea contents on
* changes, the NEED_LIFETIME_FIXED is no longer true and should be
* made conditional on DRM version.
*/
pI830->textures = i830_allocate_memory(pScrn, "classic textures", size,
PITCH_NONE,
GTT_PAGE_SIZE,
ALLOW_SHARING |
NEED_LIFETIME_FIXED,
TILE_NONE);
if (pI830->textures == NULL) {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Failed to allocate texture space.\n");
return FALSE;
}
}
return TRUE;
}
static Bool
i830_allocate_hwstatus(ScrnInfoPtr pScrn)
{
I830Ptr pI830 = I830PTR(pScrn);
int flags;
/* The current DRM will leak the HWS mapping if we update the address
* after init (at best), so allocate it fixed for its lifetime
* (i.e. not through buffer objects).
*/
flags = NEED_LIFETIME_FIXED;
if (HWS_NEED_NONSTOLEN(pI830))
flags |= NEED_NON_STOLEN;
pI830->hw_status = i830_allocate_memory(pScrn, "HW status",
HWSTATUS_PAGE_SIZE, PITCH_NONE, GTT_PAGE_SIZE, flags,
TILE_NONE);
if (pI830->hw_status == NULL) {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Failed to allocate hw status page.\n");
return FALSE;
}
return TRUE;
}
Bool
i830_allocate_pwrctx(ScrnInfoPtr pScrn)
{
@@ -1699,31 +1482,6 @@ i830_allocate_pwrctx(ScrnInfoPtr pScrn)
return TRUE;
}
Bool
i830_allocate_3d_memory(ScrnInfoPtr pScrn)
{
I830Ptr pI830 = I830PTR(pScrn);
DPRINTF(PFX, "i830_allocate_3d_memory\n");
if (!pI830->memory_manager && HWS_NEED_GFX(pI830)) {
if (!i830_allocate_hwstatus(pScrn))
return FALSE;
}
if (!i830_allocate_backbuffer(pScrn, &pI830->back_buffer, "back buffer"))
return FALSE;
if (!i830_allocate_depthbuffer(pScrn))
return FALSE;
if (!i830_allocate_texture_memory(pScrn))
return FALSE;
return TRUE;
}
#endif
/**
* Sets up tiled surface registers ("fences") for the hardware.
*

34
src/i830_xaa.c
View File

@@ -249,27 +249,7 @@ I830CheckTiling(ScrnInfoPtr pScrn)
{
I830Ptr pI830 = I830PTR(pScrn);
if (pI830->bufferOffset == pI830->front_buffer->offset &&
pI830->front_buffer->tiling != TILE_NONE)
{
return TRUE;
}
#ifdef XF86DRI
if (pI830->back_buffer != NULL &&
pI830->bufferOffset == pI830->back_buffer->offset &&
pI830->back_buffer->tiling != TILE_NONE)
{
return TRUE;
}
if (pI830->depth_buffer != NULL &&
pI830->bufferOffset == pI830->depth_buffer->offset &&
pI830->depth_buffer->tiling != TILE_NONE)
{
return TRUE;
}
#endif
return FALSE;
return pI830->front_buffer->tiling != TILE_NONE;
}
void
@@ -331,7 +311,7 @@ I830SubsequentSolidFillRect(ScrnInfoPtr pScrn, int x, int y, int w, int h)
}
OUT_BATCH(pI830->BR[13]);
OUT_BATCH((h << 16) | (w * pI830->cpp));
OUT_BATCH(pI830->bufferOffset + (y * pScrn->displayWidth + x) *
OUT_BATCH(pI830->front_buffer->offset + (y * pScrn->displayWidth + x) *
pI830->cpp);
OUT_BATCH(pI830->BR[16]);
OUT_BATCH(0);
@@ -409,10 +389,10 @@ I830SubsequentScreenToScreenCopy(ScrnInfoPtr pScrn, int src_x1, int src_y1,
OUT_BATCH(pI830->BR[13]);
OUT_BATCH((dst_y1 << 16) | (dst_x1 & 0xffff));
OUT_BATCH((dst_y2 << 16) | (dst_x2 & 0xffff));
OUT_BATCH(pI830->bufferOffset);
OUT_BATCH(pI830->front_buffer->offset);
OUT_BATCH((src_y1 << 16) | (src_x1 & 0xffff));
OUT_BATCH(pI830->BR[13] & 0xFFFF);
OUT_BATCH(pI830->bufferOffset);
OUT_BATCH(pI830->front_buffer->offset);
ADVANCE_BATCH();
}
@@ -490,7 +470,7 @@ I830SubsequentMono8x8PatternFillRect(ScrnInfoPtr pScrn, int pattx, int patty,
OUT_BATCH(pI830->BR[13]);
OUT_BATCH((y1 << 16) | x1);
OUT_BATCH((y2 << 16) | x2);
OUT_BATCH(pI830->bufferOffset);
OUT_BATCH(pI830->front_buffer->offset);
OUT_BATCH(pI830->BR[18]); /* bg */
OUT_BATCH(pI830->BR[19]); /* fg */
OUT_BATCH(pI830->BR[16]); /* pattern data */
@@ -571,7 +551,7 @@ I830SubsequentScanlineCPUToScreenColorExpandFill(ScrnInfoPtr pScrn,
"%d,%d %dx%x %d\n", x, y, w, h, skipleft);
/* Fill out register values */
pI830->BR[9] = (pI830->bufferOffset +
pI830->BR[9] = (pI830->front_buffer->offset +
(y * pScrn->displayWidth + x) * pI830->cpp);
pI830->BR[11] = ((1 << 16) | w);
}
@@ -662,7 +642,7 @@ I830SubsequentScanlineImageWriteRect(ScrnInfoPtr pScrn, int x, int y,
"%d,%d %dx%x %d\n", x, y, w, h, skipleft);
/* Fill out register values */
pI830->BR[9] = (pI830->bufferOffset +
pI830->BR[9] = (pI830->front_buffer->offset +
(y * pScrn->displayWidth + x) * pI830->cpp);
pI830->BR[11] = ((1 << 16) | w);
}