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glamor: Don't store radeon_surfaces in pixmaps

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Only EXA needs them.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Michel Dänzer
2018-05-17 12:36:29 +02:00
committed by Michel Dänzer
parent eec4a41925
commit ba5d5402b3
5 changed files with 55 additions and 82 deletions
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77
src/drmmode_display.c
View File

@@ -116,7 +116,6 @@ static PixmapPtr drmmode_create_bo_pixmap(ScrnInfoPtr pScrn,
RADEONInfoPtr info = RADEONPTR(pScrn);
ScreenPtr pScreen = pScrn->pScreen;
PixmapPtr pixmap;
struct radeon_surface *surface;
uint32_t tiling;
pixmap = (*pScreen->CreatePixmap)(pScreen, 0, 0, depth,
@@ -135,41 +134,41 @@ static PixmapPtr drmmode_create_bo_pixmap(ScrnInfoPtr pScrn,
if (!radeon_set_pixmap_bo(pixmap, bo))
goto fail;
if (info->surf_man) {
surface = radeon_get_pixmap_surface(pixmap);
if (surface) {
memset(surface, 0, sizeof(struct radeon_surface));
surface->npix_x = width;
surface->npix_y = height;
surface->npix_z = 1;
surface->blk_w = 1;
surface->blk_h = 1;
surface->blk_d = 1;
surface->array_size = 1;
surface->last_level = 0;
surface->bpe = bpp / 8;
surface->nsamples = 1;
surface->flags = RADEON_SURF_SCANOUT;
/* we are requiring a recent enough libdrm version */
surface->flags |= RADEON_SURF_HAS_TILE_MODE_INDEX;
surface->flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_2D, TYPE);
surface->flags |= RADEON_SURF_SET(RADEON_SURF_MODE_LINEAR_ALIGNED, MODE);
tiling = radeon_get_pixmap_tiling_flags(pixmap);
if (tiling & RADEON_TILING_MICRO) {
surface->flags = RADEON_SURF_CLR(surface->flags, MODE);
surface->flags |= RADEON_SURF_SET(RADEON_SURF_MODE_1D, MODE);
}
if (tiling & RADEON_TILING_MACRO) {
surface->flags = RADEON_SURF_CLR(surface->flags, MODE);
surface->flags |= RADEON_SURF_SET(RADEON_SURF_MODE_2D, MODE);
}
if (radeon_surface_best(info->surf_man, surface)) {
goto fail;
}
if (radeon_surface_init(info->surf_man, surface)) {
goto fail;
}
if (info->surf_man && !info->use_glamor) {
struct radeon_surface *surface = radeon_get_pixmap_surface(pixmap);
memset(surface, 0, sizeof(struct radeon_surface));
surface->npix_x = width;
surface->npix_y = height;
surface->npix_z = 1;
surface->blk_w = 1;
surface->blk_h = 1;
surface->blk_d = 1;
surface->array_size = 1;
surface->last_level = 0;
surface->bpe = bpp / 8;
surface->nsamples = 1;
surface->flags = RADEON_SURF_SCANOUT;
/* we are requiring a recent enough libdrm version */
surface->flags |= RADEON_SURF_HAS_TILE_MODE_INDEX;
surface->flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_2D, TYPE);
surface->flags |= RADEON_SURF_SET(RADEON_SURF_MODE_LINEAR_ALIGNED, MODE);
tiling = radeon_get_pixmap_tiling_flags(pixmap);
if (tiling & RADEON_TILING_MICRO) {
surface->flags = RADEON_SURF_CLR(surface->flags, MODE);
surface->flags |= RADEON_SURF_SET(RADEON_SURF_MODE_1D, MODE);
}
if (tiling & RADEON_TILING_MACRO) {
surface->flags = RADEON_SURF_CLR(surface->flags, MODE);
surface->flags |= RADEON_SURF_SET(RADEON_SURF_MODE_2D, MODE);
}
if (radeon_surface_best(info->surf_man, surface))
goto fail;
if (radeon_surface_init(info->surf_man, surface))
goto fail;
}
if (!info->use_glamor ||
@@ -2272,7 +2271,6 @@ drmmode_xf86crtc_resize (ScrnInfoPtr scrn, int width, int height)
int cpp = info->pixel_bytes;
struct radeon_bo *front_bo;
struct radeon_surface surface;
struct radeon_surface *psurface;
uint32_t tiling_flags = 0, base_align;
PixmapPtr ppix = screen->GetScreenPixmap(screen);
void *fb_shadow;
@@ -2353,7 +2351,8 @@ drmmode_xf86crtc_resize (ScrnInfoPtr scrn, int width, int height)
default:
break;
}
info->front_surface = surface;
if (!info->use_glamor)
info->front_surface = surface;
}
xf86DrvMsg(scrn->scrnIndex, X_INFO,
@@ -2394,8 +2393,8 @@ drmmode_xf86crtc_resize (ScrnInfoPtr scrn, int width, int height)
radeon_bo_set_tiling(info->front_bo, tiling_flags, pitch);
if (!info->r600_shadow_fb) {
psurface = radeon_get_pixmap_surface(ppix);
*psurface = info->front_surface;
if (info->surf_man && !info->use_glamor)
*radeon_get_pixmap_surface(ppix) = info->front_surface;
screen->ModifyPixmapHeader(ppix,
width, height, -1, -1, pitch, NULL);
} else {

19
src/radeon.h
View File

@@ -304,8 +304,6 @@ radeon_dirty_src_equals(PixmapDirtyUpdatePtr dirty, PixmapPtr pixmap)
#ifdef USE_GLAMOR
struct radeon_pixmap {
struct radeon_surface surface;
uint_fast32_t gpu_read;
uint_fast32_t gpu_write;
@@ -703,22 +701,9 @@ extern RADEONEntPtr RADEONEntPriv(ScrnInfoPtr pScrn);
static inline struct radeon_surface *radeon_get_pixmap_surface(PixmapPtr pPix)
{
#ifdef USE_GLAMOR
RADEONInfoPtr info = RADEONPTR(xf86ScreenToScrn(pPix->drawable.pScreen));
struct radeon_exa_pixmap_priv *driver_priv = exaGetPixmapDriverPrivate(pPix);
if (info->use_glamor) {
struct radeon_pixmap *priv;
priv = radeon_get_pixmap_private(pPix);
return priv ? &priv->surface : NULL;
} else
#endif
{
struct radeon_exa_pixmap_priv *driver_priv;
driver_priv = exaGetPixmapDriverPrivate(pPix);
return &driver_priv->surface;
}
return NULL;
return &driver_priv->surface;
}
uint32_t radeon_get_pixmap_tiling(PixmapPtr pPix);

22
src/radeon_bo_helper.c
View File

@@ -174,6 +174,9 @@ radeon_alloc_pixmap_bo(ScrnInfoPtr pScrn, int width, int height, int depth,
break;
}
}
if (new_surface)
*new_surface = surface;
}
if (tiling)
@@ -185,7 +188,6 @@ radeon_alloc_pixmap_bo(ScrnInfoPtr pScrn, int width, int height, int depth,
if (bo && tiling && radeon_bo_set_tiling(bo, tiling, pitch) == 0)
*new_tiling = tiling;
*new_surface = surface;
*new_pitch = pitch;
return bo;
}
@@ -335,26 +337,18 @@ Bool radeon_set_shared_pixmap_backing(PixmapPtr ppix, void *fd_handle,
if (!bo)
goto error;
memset(surface, 0, sizeof(struct radeon_surface));
ret = radeon_set_pixmap_bo(ppix, bo);
if (!ret)
goto error;
if (info->surf_man) {
if (surface) {
struct radeon_exa_pixmap_priv *driver_priv;
uint32_t tiling_flags;
#ifdef USE_GLAMOR
if (info->use_glamor) {
tiling_flags = radeon_get_pixmap_private(ppix)->tiling_flags;
} else
#endif
{
struct radeon_exa_pixmap_priv *driver_priv;
driver_priv = exaGetPixmapDriverPrivate(ppix);
tiling_flags = driver_priv->tiling_flags;
driver_priv = exaGetPixmapDriverPrivate(ppix);
tiling_flags = driver_priv->tiling_flags;
}
memset(surface, 0, sizeof(struct radeon_surface));
surface->npix_x = ppix->drawable.width;
surface->npix_y = ppix->drawable.height;

8
src/radeon_glamor.c
View File

@@ -250,8 +250,7 @@ radeon_glamor_create_pixmap(ScreenPtr screen, int w, int h, int depth,
priv->bo = radeon_alloc_pixmap_bo(scrn, w, h, depth, usage,
pixmap->drawable.bitsPerPixel,
&stride,
&priv->surface,
&stride, NULL,
&priv->tiling_flags);
if (!priv->bo)
goto fallback_priv;
@@ -391,15 +390,12 @@ radeon_glamor_set_shared_pixmap_backing(PixmapPtr pixmap, void *handle)
{
ScreenPtr screen = pixmap->drawable.pScreen;
ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
struct radeon_surface surface;
struct radeon_pixmap *priv;
if (!radeon_set_shared_pixmap_backing(pixmap, handle, &surface))
if (!radeon_set_shared_pixmap_backing(pixmap, handle, NULL))
return FALSE;
priv = radeon_get_pixmap_private(pixmap);
priv->surface = surface;
if (!radeon_glamor_create_textured_pixmap(pixmap, priv)) {
xf86DrvMsg(scrn->scrnIndex, X_ERROR,
"Failed to get PRIME drawable for glamor pixmap.\n");

11
src/radeon_kms.c
View File

@@ -326,7 +326,6 @@ static Bool RADEONCreateScreenResources_KMS(ScreenPtr pScreen)
ScrnInfoPtr pScrn = xf86ScreenToScrn(pScreen);
RADEONInfoPtr info = RADEONPTR(pScrn);
PixmapPtr pixmap;
struct radeon_surface *surface;
pScreen->CreateScreenResources = info->CreateScreenResources;
if (!(*pScreen->CreateScreenResources)(pScreen))
@@ -364,10 +363,9 @@ static Bool RADEONCreateScreenResources_KMS(ScreenPtr pScreen)
PixmapPtr pPix = pScreen->GetScreenPixmap(pScreen);
if (!radeon_set_pixmap_bo(pPix, info->front_bo))
return FALSE;
surface = radeon_get_pixmap_surface(pPix);
if (surface) {
*surface = info->front_surface;
}
if (info->surf_man && !info->use_glamor)
*radeon_get_pixmap_surface(pPix) = info->front_surface;
}
}
@@ -2758,7 +2756,8 @@ static Bool radeon_setup_kernel_mem(ScreenPtr pScreen)
default:
break;
}
info->front_surface = surface;
if (!info->use_glamor)
info->front_surface = surface;
}
{
int cursor_size;