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Remove RR_Capability_SinkOutput for GPU without CRTC.

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Signed-off-by: Qiang Yu <Qiang.Yu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
This commit is contained in:
Qiang Yu
2016-04-08 17:29:17 +08:00
committed by Michel Dänzer
parent 1a29c4bcc0
commit a0bbb373f9
1 changed files with 7 additions and 4 deletions
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11
src/amdgpu_kms.c
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@@ -758,8 +758,11 @@ static void AMDGPUSetupCapabilities(ScrnInfoPtr pScrn)
if (ret == 0) {
if (value & DRM_PRIME_CAP_EXPORT)
pScrn->capabilities |= RR_Capability_SourceOutput | RR_Capability_SinkOffload;
if (value & DRM_PRIME_CAP_IMPORT)
pScrn->capabilities |= RR_Capability_SinkOutput | RR_Capability_SourceOffload;
if (value & DRM_PRIME_CAP_IMPORT) {
pScrn->capabilities |= RR_Capability_SourceOffload;
if (info->drmmode.count_crtcs)
pScrn->capabilities |= RR_Capability_SinkOutput;
}
}
#endif
}
@@ -873,8 +876,6 @@ Bool AMDGPUPreInit_KMS(ScrnInfoPtr pScrn, int flags)
amdgpu_drm_queue_init();
AMDGPUSetupCapabilities(pScrn);
/* don't enable tiling if accel is not enabled */
if (info->use_glamor) {
/* set default group bytes, overridden by kernel info below */
@@ -928,6 +929,8 @@ Bool AMDGPUPreInit_KMS(ScrnInfoPtr pScrn, int flags)
goto fail;
}
AMDGPUSetupCapabilities(pScrn);
if (info->drmmode.count_crtcs == 1)
pAMDGPUEnt->HasCRTC2 = FALSE;
else