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amdgpu: add the xf86-video-amdgpu driver

Browse Source 
This adds the new xf86-video-amdgpu driver for
newer AMD GPUs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher
2015-04-20 11:57:52 -04:00
commit ff62bf6e9d
37 changed files with 8436 additions and 0 deletions
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81
.gitignore vendored Normal file
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#
# X.Org module default exclusion patterns
# The next section if for module specific patterns
#
# Do not edit the following section
# GNU Build System (Autotools)
aclocal.m4
autom4te.cache/
autoscan.log
ChangeLog
compile
config.guess
config.h
config.h.in
config.log
config-ml.in
config.py
config.status
config.status.lineno
config.sub
configure
configure.scan
depcomp
.deps/
INSTALL
install-sh
.libs/
libtool
libtool.m4
ltmain.sh
lt~obsolete.m4
ltoptions.m4
ltsugar.m4
ltversion.m4
Makefile
Makefile.in
mdate-sh
missing
mkinstalldirs
*.pc
py-compile
stamp-h?
symlink-tree
texinfo.tex
ylwrap
# Do not edit the following section
# Edit Compile Debug Document Distribute
*~
*.[0-9]
*.[0-9]x
*.bak
*.bin
core
*.dll
*.exe
*-ISO*.bdf
*-JIS*.bdf
*-KOI8*.bdf
*.kld
*.ko
*.ko.cmd
*.lai
*.l[oa]
*.[oa]
*.obj
*.patch
*.so
*.pcf.gz
*.pdb
*.tar.bz2
*.tar.gz
*.swp
*.out
tags
#
# Add & Override patterns for xf86-video-ati
#
# Edit the following section as needed
# For example, !report.pc overrides *.pc. See 'man gitignore'
#

129
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Copyright 1997 through 2004 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
Permission to use, copy, modify, distribute, and sell this software and its
documentation for any purpose is hereby granted without fee, provided that
the above copyright notice appear in all copies and that both that copyright
notice and this permission notice appear in supporting documentation, and
that the name of Marc Aurele La France not be used in advertising or
publicity pertaining to distribution of the software without specific,
written prior permission. Marc Aurele La France makes no representations
about the suitability of this software for any purpose. It is provided
"as-is" without express or implied warranty.
MARC AURELE LA FRANCE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO
EVENT SHALL MARC AURELE LA FRANCE BE LIABLE FOR ANY SPECIAL, INDIRECT OR
CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
PERFORMANCE OF THIS SOFTWARE.
Copyright (C) 2005 Bogdan D. bogdand@users.sourceforge.net
Copyright (c) 1995-2003 by The XFree86 Project, Inc.
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
to deal in the Software without restriction, including without limitation
the rights to use, copy, modify, merge, publish, distribute, sublicense,
and/or sell copies of the Software, and to permit persons to whom the
Software is furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
OTHER DEALINGS IN THE SOFTWARE.
Except as contained in this notice, the name of the copyright holder(s)
and author(s) shall not be used in advertising or otherwise to promote
the sale, use or other dealings in this Software without prior written
authorization from the copyright holder(s) and author(s).
Copyright 2006-2007 Advanced Micro Devices, Inc.
Copyright 2007 Egbert Eich <eich@novell.com>
Copyright 2007 Matthias Hopf <mhopf@novell.com>
Copyright (C) 1999-2001 Brian Paul All Rights Reserved.
Copyright 2007 Luc Verhaegen <lverhaegen@novell.com>
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
to deal in the Software without restriction, including without limitation
the rights to use, copy, modify, merge, publish, distribute, sublicense,
and/or sell copies of the Software, and to permit persons to whom the
Software is furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
OTHER DEALINGS IN THE SOFTWARE.
Copyright 2007 Advanced Micro Devices, Inc.
Copyright (C) 2008-2009 Advanced Micro Devices, Inc.
Copyright 2004 Eric Anholt
Copyright 2005 Eric Anholt
Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
Copyright 2004 ATI Technologies Inc., Markham, Ontario
Copyright (C) 2008-2009 Alexander Deucher
Copyright 2008 Jérôme Glisse
Copyright 2005 Benjamin Herrenschmidt
Copyright 2008 Kristian Høgsberg
Copyright (C) 2008-2009 Matthias Hopf
Copyright (c) 2006 Itronix Inc.
Copyright 2000 Precision Insight, Inc., Cedar Park, Texas.
Copyright © 2007 Red Hat, Inc.
Copyright © 2009 Red Hat, Inc.
Copyright 2007 George Sapountzis
Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas.
Copyright 2006 Tungsten Graphics, Inc.
Copyright 2000 VA Linux Systems, Inc., Fremont, California.
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
to deal in the Software without restriction, including without limitation
the rights to use, copy, modify, merge, publish, distribute, sublicense,
and/or sell copies of the Software, and to permit persons to whom the
Software is furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice (including the next
paragraph) shall be included in all copies or substantial portions of the
Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
Copyright © 2006 Keith Packard
Permission to use, copy, modify, distribute, and sell this software and its
documentation for any purpose is hereby granted without fee, provided that
the above copyright notice appear in all copies and that both that copyright
notice and this permission notice appear in supporting documentation, and
that the name of the copyright holders not be used in advertising or
publicity pertaining to distribution of the software without specific,
written prior permission. The copyright holders make no representations
about the suitability of this software for any purpose. It is provided "as
is" without express or implied warranty.
THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
OF THIS SOFTWARE.

32
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# Copyright 2005 Adam Jackson.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# on the rights to use, copy, modify, merge, publish, distribute, sub
# license, and/or sell copies of the Software, and to permit persons to whom
# the Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice (including the next
# paragraph) shall be included in all copies or substantial portions of the
# Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
# ADAM JACKSON BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
SUBDIRS = src man
MAINTAINERCLEANFILES = ChangeLog INSTALL
.PHONY: ChangeLog INSTALL
INSTALL:
$(INSTALL_CMD)
ChangeLog:
$(CHANGELOG_CMD)
EXTRA_DIST = ChangeLog INSTALL

25
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xf86-video-ati - ATI Radeon video driver for the Xorg X server
All questions regarding this software should be directed at the
Xorg mailing list:
http://lists.freedesktop.org/mailman/listinfo/xorg
Please submit bug reports to the Xorg bugzilla:
https://bugs.freedesktop.org/enter_bug.cgi?product=xorg
The master development code repository can be found at:
git://anongit.freedesktop.org/git/xorg/driver/xf86-video-ati
http://cgit.freedesktop.org/xorg/driver/xf86-video-ati
For patch submission instructions, see:
http://www.x.org/wiki/Development/Documentation/SubmittingPatches
For more information on the git code manager, see:
http://wiki.x.org/wiki/GitPage

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autogen.sh Executable file
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#! /bin/sh
srcdir=`dirname $0`
test -z "$srcdir" && srcdir=.
ORIGDIR=`pwd`
cd $srcdir
autoreconf -v --install || exit 1
cd $ORIGDIR || exit $?
if test -z "$NOCONFIGURE"; then
$srcdir/configure --enable-maintainer-mode "$@"
fi

234
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# Copyright 2005 Adam Jackson.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# on the rights to use, copy, modify, merge, publish, distribute, sub
# license, and/or sell copies of the Software, and to permit persons to whom
# the Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice (including the next
# paragraph) shall be included in all copies or substantial portions of the
# Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
# ADAM JACKSON BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#
# Process this file with autoconf to produce a configure script
# Initialize Autoconf
AC_PREREQ([2.60])
AC_INIT([xf86-video-amdgpu],
[0.0.01],
[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg],
[xf86-video-amdgpu])
AC_CONFIG_SRCDIR([Makefile.am])
AC_CONFIG_HEADERS([config.h])
AC_CONFIG_AUX_DIR(.)
# Initialize Automake
AM_INIT_AUTOMAKE([foreign dist-bzip2])
AC_SYS_LARGEFILE
AM_MAINTAINER_MODE
# Require X.Org macros 1.8 or later for MAN_SUBSTS set by XORG_MANPAGE_SECTIONS
m4_ifndef([XORG_MACROS_VERSION],
[m4_fatal([must install xorg-macros 1.8 or later before running autoconf/autogen])])
XORG_MACROS_VERSION(1.8)
XORG_DEFAULT_OPTIONS
# Initialize libtool
AC_DISABLE_STATIC
AC_PROG_LIBTOOL
# Checks for programs.
AM_PROG_CC_C_O
if test "x$GCC" = "xyes"; then
CPPFLAGS="$CPPFLAGS -Wall"
fi
AH_TOP([#include "xorg-server.h"])
# Define a configure option for an alternate module directory
AC_ARG_WITH(xorg-module-dir,
AS_HELP_STRING([--with-xorg-module-dir=DIR],
[Default xorg module directory [[default=$libdir/xorg/modules]]]),
[moduledir="$withval"],
[moduledir="$libdir/xorg/modules"])
# Store the list of server defined optional extensions in REQUIRED_MODULES
XORG_DRIVER_CHECK_EXT(RANDR, randrproto)
XORG_DRIVER_CHECK_EXT(RENDER, renderproto)
XORG_DRIVER_CHECK_EXT(XV, videoproto)
XORG_DRIVER_CHECK_EXT(DPMSExtension, xextproto)
# Checks for libraries.
PKG_CHECK_MODULES(LIBDRM, [libdrm >= 2.4.46])
PKG_CHECK_MODULES(LIBDRM_AMDGPU, [libdrm_amdgpu])
# Obtain compiler/linker options for the driver dependencies
PKG_CHECK_MODULES(XORG, [xorg-server >= 1.7 xproto fontsproto xf86driproto $REQUIRED_MODULES])
PKG_CHECK_MODULES(XEXT, [xextproto >= 7.0.99.1],
HAVE_XEXTPROTO_71="yes"; AC_DEFINE(HAVE_XEXTPROTO_71, 1, [xextproto 7.1 available]),
HAVE_XEXTPROTO_71="no")
AM_CONDITIONAL(HAVE_XEXTPROTO_71, [ test "$HAVE_XEXTPROTO_71" = "yes" ])
AC_ARG_ENABLE([udev],
AS_HELP_STRING([--disable-udev], [Disable libudev support [default=auto]]),
[enable_udev="$enableval"],
[enable_udev=auto])
if test "x$enable_udev" != "xno"; then
PKG_CHECK_MODULES(LIBUDEV, [libudev], [LIBUDEV=yes], [LIBUDEV=no])
if test "x$LIBUDEV" = xyes; then
AC_DEFINE(HAVE_LIBUDEV, 1,[libudev support])
elif test "x$enable_udev" != "xauto"; then
AC_MSG_ERROR([Building with udev requested but libudev not found])
fi
fi
AM_CONDITIONAL(LIBUDEV, test x$LIBUDEV = xyes)
SAVE_CPPFLAGS="$CPPFLAGS"
CPPFLAGS="$CPPFLAGS $XORG_CFLAGS"
AC_MSG_CHECKING([whether to include GLAMOR support])
AC_ARG_ENABLE(glamor,
AS_HELP_STRING([--disable-glamor],
[Disable glamor, a new GL-based acceleration [default=enabled]]),
[GLAMOR="$enableval"],
[GLAMOR=yes])
if test "x$GLAMOR" != "xno"; then
AC_CHECK_HEADERS([glamor.h], [GLAMOR_H="yes"], [GLAMOR_H="no"], [#include "xorg-server.h"])
if test "x$GLAMOR_H" = xyes; then
AC_CHECK_DECL(GLAMOR_NO_DRI3,
[GLAMOR_XSERVER="yes"], [GLAMOR_XSERVER="no"],
[#include "xorg-server.h"
#include "glamor.h"])
fi
if test "x$GLAMOR_XSERVER" != xyes; then
PKG_CHECK_MODULES(LIBGLAMOR, [glamor >= 0.6.0])
PKG_CHECK_MODULES(LIBGLAMOR_EGL, [glamor-egl])
fi
AC_DEFINE(USE_GLAMOR, 1, [Enable glamor acceleration])
else
AC_MSG_RESULT([$GLAMOR])
fi
AM_CONDITIONAL(GLAMOR, test x$GLAMOR != xno)
AC_CHECK_HEADERS([list.h],
[have_list_h="yes"], [have_list_h="no"],
[#include <X11/Xdefs.h>
#include "xorg-server.h"])
if test "x$have_list_h" = xyes; then
AC_CHECK_DECL(xorg_list_init,
[AC_DEFINE(HAVE_XORG_LIST, 1, [Have xorg_list API])], [],
[#include <X11/Xdefs.h>
#include "xorg-server.h"
#include "list.h"])
fi
CPPFLAGS="$SAVE_CPPFLAGS"
PKG_CHECK_MODULES([PCIACCESS], [pciaccess >= 0.8.0])
XORG_CFLAGS="$XORG_CFLAGS $PCIACCESS_CFLAGS"
# Checks for headers/macros for byte swapping
# Known variants:
# <byteswap.h> bswap_16, bswap_32, bswap_64 (glibc)
# <sys/endian.h> __swap16, __swap32, __swap64 (OpenBSD)
# <sys/endian.h> bswap16, bswap32, bswap64 (other BSD's)
# and a fallback to local macros if none of the above are found
# if <byteswap.h> is found, assume it's the correct version
AC_CHECK_HEADERS([byteswap.h])
# if <sys/endian.h> is found, have to check which version
AC_CHECK_HEADER([sys/endian.h], [HAVE_SYS_ENDIAN_H="yes"], [HAVE_SYS_ENDIAN_H="no"])
if test "x$HAVE_SYS_ENDIAN_H" = "xyes" ; then
AC_MSG_CHECKING([for __swap16 variant of <sys/endian.h> byteswapping macros])
AC_LINK_IFELSE([AC_LANG_PROGRAM([
#include <sys/types.h>
#include <sys/endian.h>
], [
int a = 1, b;
b = __swap16(a);
])
], [SYS_ENDIAN__SWAP='yes'], [SYS_ENDIAN__SWAP='no'])
AC_MSG_RESULT([$SYS_ENDIAN__SWAP])
AC_MSG_CHECKING([for bswap16 variant of <sys/endian.h> byteswapping macros])
AC_LINK_IFELSE([AC_LANG_PROGRAM([
#include <sys/types.h>
#include <sys/endian.h>
], [
int a = 1, b;
b = bswap16(a);
])
], [SYS_ENDIAN_BSWAP='yes'], [SYS_ENDIAN_BSWAP='no'])
AC_MSG_RESULT([$SYS_ENDIAN_BSWAP])
if test "$SYS_ENDIAN_BSWAP" = "yes" ; then
USE_SYS_ENDIAN_H=yes
BSWAP=bswap
else
if test "$SYS_ENDIAN__SWAP" = "yes" ; then
USE_SYS_ENDIAN_H=yes
BSWAP=__swap
else
USE_SYS_ENDIAN_H=no
fi
fi
if test "$USE_SYS_ENDIAN_H" = "yes" ; then
AC_DEFINE([USE_SYS_ENDIAN_H], 1,
[Define to use byteswap macros from <sys/endian.h>])
AC_DEFINE_UNQUOTED([bswap_16], ${BSWAP}16,
[Define to 16-bit byteswap macro])
AC_DEFINE_UNQUOTED([bswap_32], ${BSWAP}32,
[Define to 32-bit byteswap macro])
AC_DEFINE_UNQUOTED([bswap_64], ${BSWAP}64,
[Define to 64-bit byteswap macro])
fi
fi
AC_SUBST([moduledir])
DRIVER_NAME=amdgpu
AC_SUBST([DRIVER_NAME])
AC_CONFIG_FILES([
Makefile
src/Makefile
man/Makefile
])
AC_OUTPUT
dnl
dnl Output some configuration info for the user
dnl
echo ""
echo " prefix: $prefix"
echo " exec_prefix: $exec_prefix"
echo " libdir: $libdir"
echo " includedir: $includedir"
echo ""
echo " CFLAGS: $CFLAGS"
echo " CXXFLAGS: $CXXFLAGS"
echo " Macros: $DEFINES"
echo ""
echo " Run '${MAKE-make}' to build xf86-video-amdgpu"
echo ""

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#
# Copyright 2005 Sun Microsystems, Inc. All rights reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice (including the next
# paragraph) shall be included in all copies or substantial portions of the
# Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
# DEALINGS IN THE SOFTWARE.
#
drivermandir = $(DRIVER_MAN_DIR)
driverman_PRE = @DRIVER_NAME@.man
driverman_DATA = $(driverman_PRE:man=@DRIVER_MAN_SUFFIX@)
EXTRA_DIST = @DRIVER_NAME@.man
CLEANFILES = $(driverman_DATA)
# String replacements in MAN_SUBSTS now come from xorg-macros.m4 via configure
SUFFIXES = .$(DRIVER_MAN_SUFFIX) .man
.man.$(DRIVER_MAN_SUFFIX):
$(AM_V_GEN)$(SED) $(MAN_SUBSTS) < $< > $@

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.ds q \N'34'
.TH AMDGPU __drivermansuffix__ __vendorversion__
.SH NAME
amdgpu \- AMD RADEON GPU video driver
.SH SYNOPSIS
.nf
.B "Section \*qDevice\*q"
.BI " Identifier \*q" devname \*q
.B " Driver \*qamdgpu\*q"
\ \ ...
.B EndSection
.fi
.SH DESCRIPTION
.B amdgpu
is an __xservername__ driver for AMD RADEON-based video cards with the
following features:
.PP
.PD 0
.TP 2
\(bu
Support for 24-bit pixel depth;
.TP
\(bu
RandR support up to version 1.4;
.TP
\(bu
3D acceleration;
.PD
.SH SUPPORTED HARDWARE
The
.B amdgpu
driver supports CI and newer families' video cards.
.PD
.SH CONFIGURATION DETAILS
Please refer to __xconfigfile__(__filemansuffix__) for general configuration
details. This section only covers configuration details specific to this
driver.
.PP
The following driver
.B Options
are supported:
.TP
.BI "Option \*qSWcursor\*q \*q" boolean \*q
Selects software cursor. The default is
.B off.
.TP
.BI "Option \*qNoAccel\*q \*q" boolean \*q
Enables or disables all hardware acceleration.
.br
The default is to
.B enable
hardware acceleration.
.TP
.BI "Option \*qZaphodHeads\*q \*q" string \*q
Specify the RandR output(s) to use with zaphod mode for a particular driver
instance. If you use this option you must use this option for all instances
of the driver.
.br
For example:
.B
Option \*qZaphodHeads\*q \*qLVDS,VGA-0\*q
will assign xrandr outputs LVDS and VGA-0 to this instance of the driver.
.TP
.BI "Option \*qEnablePageFlip\*q \*q" boolean \*q
Enable DRI2 page flipping. The default is
.B on.
.SH SEE ALSO
__xservername__(__appmansuffix__), __xconfigfile__(__filemansuffix__), Xserver(__appmansuffix__), X(__miscmansuffix__)
.IP " 1." 4
Wiki page:
.RS 4
http://www.x.org/wiki/radeon
.RE
.IP " 2." 4
Overview about amdgpu development code:
.RS 4
http://cgit.freedesktop.org/xorg/driver/xf86-video-amdgpu/
.RE
.IP " 3." 4
Mailing list:
.RS 4
http://lists.x.org/mailman/listinfo/xorg-driver-ati
.RE
.IP " 4." 4
IRC channel:
.RS 4
#radeon on irc.freenode.net
.RE
.IP " 5." 4
Query the bugtracker for amdgpu bugs:
.RS 4
https://bugs.freedesktop.org/query.cgi?product=xorg&component=Driver/AMDgpu
.RE
.IP " 6." 4
Submit bugs & patches:
.RS 4
https://bugs.freedesktop.org/enter_bug.cgi?product=xorg&component=Driver/AMDgpu
.RE
.SH AUTHORS
.nf
Authors include:
Michel D\(:anzer \fImichel@daenzer.net\fP
Alex Deucher \fIalexdeucher@gmail.com\fP

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# Copyright 2005 Adam Jackson.
# Copyright 2005 Red Hat, Inc.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# on the rights to use, copy, modify, merge, publish, distribute, sub
# license, and/or sell copies of the Software, and to permit persons to whom
# the Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice (including the next
# paragraph) shall be included in all copies or substantial portions of the
# Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
# ADAM JACKSON BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
# this is obnoxious:
# -module lets us name the module exactly how we want
# -avoid-version prevents gratuitous .0.0.0 version numbers on the end
# _ladir passes a dummy rpath to libtool so the thing will actually link
# TODO: -nostdlib/-Bstatic/-lgcc platform magic, not installing the .a, etc.
amdgpu_drv_la_LIBADD = $(PCIACCESS_LIBS) $(LIBDRM_AMDGPU_LIBS)
AMDGPU_KMS_SRCS=amdgpu_dri2.c amdgpu_kms.c drmmode_display.c amdgpu_bo_helper.c
AM_CFLAGS = \
@LIBDRM_AMDGPU_CFLAGS@ \
@XORG_CFLAGS@ \
@LIBUDEV_CFLAGS@
if LIBUDEV
amdgpu_drv_la_LIBADD += $(LIBUDEV_LIBS)
endif
amdgpu_drv_la_LTLIBRARIES = amdgpu_drv.la
amdgpu_drv_la_LDFLAGS = -module -avoid-version
amdgpu_drv_ladir = @moduledir@/drivers
amdgpu_drv_la_SOURCES = \
amdgpu_video.c \
amdgpu_misc.c amdgpu_probe.c \
$(AMDGPU_KMS_SRCS)
AM_CFLAGS += @LIBGLAMOR_CFLAGS@
amdgpu_drv_la_LIBADD += @LIBGLAMOR_LIBS@
amdgpu_drv_la_SOURCES += \
amdgpu_glamor.c \
amdgpu_pixmap.c
EXTRA_DIST = \
compat-api.h \
amdgpu_bo_helper.h \
amdgpu_glamor.h \
amdgpu_drv.h \
amdgpu_probe.h \
amdgpu_version.h \
amdgpu_video.h \
simple_list.h \
amdpciids.h \
ati_pciids_gen.h \
amdgpu_chipinfo_gen.h \
amdgpu_chipset_gen.h \
amdgpu_pci_chipset_gen.h \
amdgpu_pci_device_match_gen.h \
pcidb/ati_pciids.csv \
pcidb/parse_pci_ids.pl \
amdgpu_dri2.h \
drmmode_display.h

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/*
* Copyright 2012 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include <sys/mman.h>
#include <gbm.h>
#include "amdgpu_drv.h"
#include "amdgpu_bo_helper.h"
#include "amdgpu_pixmap.h"
/* Calculate appropriate pitch for a pixmap and allocate a BO that can hold it.
*/
struct amdgpu_buffer *amdgpu_alloc_pixmap_bo(ScrnInfoPtr pScrn, int width,
int height, int depth, int usage_hint,
int bitsPerPixel, int *new_pitch)
{
AMDGPUInfoPtr info = AMDGPUPTR(pScrn);
struct amdgpu_buffer *pixmap_buffer;
if (info->gbm) {
uint32_t bo_use = GBM_BO_USE_RENDERING;
uint32_t gbm_format;
switch (depth) {
#ifdef GBM_FORMAT_R8
case 8:
gbm_format = GBM_FORMAT_R8;
break;
#endif
case 16:
gbm_format = GBM_FORMAT_RGB565;
break;
case 32:
gbm_format = GBM_FORMAT_ARGB8888;
break;
case 24:
if (bitsPerPixel == 32) {
gbm_format = GBM_FORMAT_XRGB8888;
break;
}
/* fall through */
default:
ErrorF("%s: Unsupported depth/bpp %d/%d\n", __func__,
depth, bitsPerPixel);
return NULL;
}
pixmap_buffer = (struct amdgpu_buffer *)calloc(1, sizeof(struct amdgpu_buffer));
if (!pixmap_buffer) {
return NULL;
}
pixmap_buffer->ref_count = 1;
if ( bitsPerPixel == pScrn->bitsPerPixel)
bo_use |= GBM_BO_USE_SCANOUT;
#ifdef CREATE_PIXMAP_USAGE_SHARED
if (usage_hint == CREATE_PIXMAP_USAGE_SHARED) {
/* XXX: Need to tell GBM to disable tiling in this case */
}
#endif
if (usage_hint & AMDGPU_CREATE_PIXMAP_LINEAR) {
bo_use |= GBM_BO_USE_LINEAR;
}
pixmap_buffer->bo.gbm = gbm_bo_create(info->gbm, width, height,
gbm_format,
bo_use);
if (!pixmap_buffer->bo.gbm) {
free(pixmap_buffer);
return NULL;
}
pixmap_buffer->flags |= AMDGPU_BO_FLAGS_GBM;
if (new_pitch)
*new_pitch = gbm_bo_get_stride(pixmap_buffer->bo.gbm);
} else {
AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(pScrn);
unsigned cpp = (bitsPerPixel + 7) / 8;
unsigned pitch = cpp *
AMDGPU_ALIGN(width, drmmode_get_pitch_align(pScrn, cpp));
pixmap_buffer = amdgpu_bo_open(pAMDGPUEnt->pDev, pitch * height,
4096, AMDGPU_GEM_DOMAIN_VRAM);
if (new_pitch)
*new_pitch = pitch;
}
return pixmap_buffer;
}
int amdgpu_bo_map(ScrnInfoPtr pScrn, struct amdgpu_buffer *bo)
{
AMDGPUInfoPtr info = AMDGPUPTR(pScrn);
int ret = 0;
if (info->use_glamor)
return 0;
if (bo->flags & AMDGPU_BO_FLAGS_GBM) {
uint32_t handle, stride, height;
union drm_amdgpu_gem_mmap args;
int fd;
void *ptr;
handle = gbm_bo_get_handle(bo->bo.gbm).u32;
stride = gbm_bo_get_stride(bo->bo.gbm);
height = gbm_bo_get_height(bo->bo.gbm);
fd = info->dri2.drm_fd;
memset(&args, 0, sizeof(union drm_amdgpu_gem_mmap));
args.in.handle = handle;
ret = drmCommandWriteRead(fd, DRM_AMDGPU_GEM_MMAP,
&args, sizeof(args));
if (ret) {
ErrorF("Failed to get the mmap offset\n");
return ret;
}
ptr = mmap(NULL, stride * height,
PROT_READ | PROT_WRITE, MAP_SHARED,
fd, args.out.addr_ptr);
if (ptr == NULL) {
ErrorF("Failed to mmap the bo\n");
return -1;
}
bo->cpu_ptr = ptr;
} else
ret = amdgpu_bo_cpu_map(bo->bo.amdgpu, &bo->cpu_ptr);
return ret;
}
void amdgpu_bo_unmap(struct amdgpu_buffer *bo)
{
if (bo->cpu_ptr == NULL)
return;
if (bo->flags & AMDGPU_BO_FLAGS_GBM) {
uint32_t stride, height;
stride = gbm_bo_get_stride(bo->bo.gbm);
height = gbm_bo_get_height(bo->bo.gbm);
munmap(bo->cpu_ptr, stride * height);
} else
amdgpu_bo_cpu_unmap(bo->bo.amdgpu);
}
struct amdgpu_buffer *amdgpu_bo_open(amdgpu_device_handle pDev,
uint32_t alloc_size,
uint32_t phys_alignment,
uint32_t domains)
{
struct amdgpu_bo_alloc_request alloc_request;
struct amdgpu_bo_alloc_result buffer;
struct amdgpu_buffer *bo = NULL;
memset(&alloc_request, 0, sizeof(struct amdgpu_bo_alloc_request));
memset(&buffer, 0, sizeof(struct amdgpu_bo_alloc_result));
bo = (struct amdgpu_buffer *)calloc(1, sizeof(struct amdgpu_buffer));
if (bo == NULL) {
return NULL;
}
alloc_request.alloc_size = alloc_size;
alloc_request.phys_alignment = phys_alignment;
alloc_request.preferred_heap = domains;
if (amdgpu_bo_alloc(pDev, &alloc_request, &buffer)) {
free(bo);
return NULL;
}
bo->bo.amdgpu = buffer.buf_handle;
bo->ref_count = 1;
return bo;
}
void amdgpu_bo_ref(struct amdgpu_buffer *buffer)
{
buffer->ref_count++;
}
void amdgpu_bo_unref(struct amdgpu_buffer **buffer)
{
struct amdgpu_buffer *buf = *buffer;
buf->ref_count--;
if (buf->ref_count) {
return;
}
amdgpu_bo_unmap(buf);
if (buf->flags & AMDGPU_BO_FLAGS_GBM) {
gbm_bo_destroy(buf->bo.gbm);
} else {
amdgpu_bo_free(buf->bo.amdgpu);
}
free(buf);
*buffer = NULL;
}
int amdgpu_query_bo_size(amdgpu_bo_handle buf_handle, uint32_t *size)
{
struct amdgpu_bo_info buffer_info;
memset(&buffer_info, 0, sizeof(struct amdgpu_bo_info));
int ret;
ret = amdgpu_bo_query_info(buf_handle, &buffer_info);
if (ret)
*size = 0;
else
*size = (uint32_t)(buffer_info.alloc_size);
return ret;
}
int amdgpu_query_heap_size(amdgpu_device_handle pDev,
uint32_t heap,
uint64_t *heap_size,
uint64_t *max_allocation)
{
struct amdgpu_heap_info heap_info;
memset(&heap_info, 0, sizeof(struct amdgpu_heap_info));
int ret;
ret = amdgpu_query_heap_info(pDev, heap, 0, &heap_info);
if (ret) {
*heap_size = 0;
*max_allocation = 0;
} else {
*heap_size = heap_info.heap_size;
*max_allocation = heap_info.max_allocation;
}
return ret;
}
struct amdgpu_buffer *amdgpu_gem_bo_open_prime(amdgpu_device_handle pDev,
int fd_handle,
uint32_t size)
{
struct amdgpu_buffer *bo = NULL;
struct amdgpu_bo_import_result buffer = {0};
bo = (struct amdgpu_buffer *)calloc(1, sizeof(struct amdgpu_buffer));
if (bo == NULL) {
return NULL;
}
if (amdgpu_bo_import(pDev, amdgpu_bo_handle_type_dma_buf_fd,
(uint32_t)fd_handle, &buffer)) {
free(bo);
return FALSE;
}
bo->bo.amdgpu = buffer.buf_handle;
bo->ref_count = 1;
return bo;
}
#ifdef AMDGPU_PIXMAP_SHARING
Bool amdgpu_share_pixmap_backing(struct amdgpu_buffer *bo, void **handle_p)
{
int handle;
amdgpu_bo_export(bo->bo.amdgpu, amdgpu_bo_handle_type_dma_buf_fd,
(uint32_t *)&handle);
*handle_p = (void *)(long)handle;
return TRUE;
}
Bool amdgpu_set_shared_pixmap_backing(PixmapPtr ppix, void *fd_handle)
{
ScrnInfoPtr pScrn = xf86ScreenToScrn(ppix->drawable.pScreen);
AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(pScrn);
struct amdgpu_buffer *pixmap_buffer = NULL;
int ihandle = (int)(long)fd_handle;
uint32_t size = ppix->devKind * ppix->drawable.height;
pixmap_buffer = amdgpu_gem_bo_open_prime(pAMDGPUEnt->pDev, ihandle, size);
if (!pixmap_buffer) {
return FALSE;
}
amdgpu_set_pixmap_bo(ppix, pixmap_buffer);
close(ihandle);
/* we have a reference from the alloc and one from set pixmap bo,
drop one */
amdgpu_bo_unref(&pixmap_buffer);
return TRUE;
}
#endif /* AMDGPU_PIXMAP_SHARING */

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/*
* Copyright 2012 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef AMDGPU_BO_HELPER_H
#define AMDGPU_BO_HELPER_H 1
#include "amdgpu_drv.h"
extern struct amdgpu_buffer *amdgpu_alloc_pixmap_bo(ScrnInfoPtr pScrn, int width,
int height, int depth, int usage_hint,
int bitsPerPixel, int *new_pitch);
extern int amdgpu_bo_map(ScrnInfoPtr pScrn, struct amdgpu_buffer *bo);
extern void amdgpu_bo_unmap(struct amdgpu_buffer *bo);
extern Bool amdgpu_share_pixmap_backing(struct amdgpu_buffer *bo, void **handle_p);
extern Bool
amdgpu_set_shared_pixmap_backing(PixmapPtr ppix, void *fd_handle);
/* helper function to allocate memory to be used for GPU operations
*
* \param pDev - \c [in] device handle
* \param alloc_size - \c [in] allocation size
* \param phys_alignment - \c [in] requested alignment. 0 means no alignment requirement
* \param domains - \c [in] GEM domains
*
* \return pointer to amdgpu_buffer on success
* NULL on failure
*/
extern struct amdgpu_buffer *amdgpu_bo_open(amdgpu_device_handle pDev,
uint32_t alloc_size,
uint32_t phys_alignment,
uint32_t domains);
/* helper function to add the ref_count of a amdgpu_buffer
* \param buffer - \c [in] amdgpu_buffer
*/
extern void amdgpu_bo_ref(struct amdgpu_buffer *buffer);
/* helper function to dec the ref_count of a amdgpu_buffer
* \param buffer - \c [in] amdgpu_buffer
*/
extern void amdgpu_bo_unref(struct amdgpu_buffer **buffer);
/* helper function to query the buffer size
* \param buf_handle - \c [in] amdgpu bo handle
* \param size - \c [out] pointer to buffer size
*
* \return 0 on success
>0 - AMD specific error code \n
<0 - Negative POSIX error code
*/
int amdgpu_query_bo_size(amdgpu_bo_handle buf_handle, uint32_t *size);
/* helper function to query the heap information
* \param pDev - \c [in] amdgpu device handle
* \param heap - \c [in] heap type
* \param heap_size - \c [out] theoretical max available memory
* \param max_allcoation - \c [out] theoretical possible max. size of buffer
*
* \return 0 on success
>0 - AMD specific error code \n
<0 - Negative POSIX error code
*/
int amdgpu_query_heap_size(amdgpu_device_handle pDev,
uint32_t heap,
uint64_t *heap_size,
uint64_t *max_allocation);
/* helper function to convert a DMA buf handle to a KMS handle
* \param pDev - \c [in] amdgpu device handle
* \param fd_handle - \c [in] dma-buf fd handle
* \size size - \c [in] buffer size
*
* \return pointer to amdgpu_buffer on success
NULL on failure
*/
struct amdgpu_buffer *amdgpu_gem_bo_open_prime(amdgpu_device_handle pDev,
int fd_handle,
uint32_t size);
#endif /* AMDGPU_BO_HELPER_H */

76
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/* This file is autogenerated please do not edit */
static AMDGPUCardInfo AMDGPUCards[] = {
{ 0x6640, CHIP_FAMILY_BONAIRE },
{ 0x6641, CHIP_FAMILY_BONAIRE },
{ 0x6649, CHIP_FAMILY_BONAIRE },
{ 0x6650, CHIP_FAMILY_BONAIRE },
{ 0x6651, CHIP_FAMILY_BONAIRE },
{ 0x6658, CHIP_FAMILY_BONAIRE },
{ 0x665C, CHIP_FAMILY_BONAIRE },
{ 0x665D, CHIP_FAMILY_BONAIRE },
{ 0x9830, CHIP_FAMILY_KABINI },
{ 0x9831, CHIP_FAMILY_KABINI },
{ 0x9832, CHIP_FAMILY_KABINI },
{ 0x9833, CHIP_FAMILY_KABINI },
{ 0x9834, CHIP_FAMILY_KABINI },
{ 0x9835, CHIP_FAMILY_KABINI },
{ 0x9836, CHIP_FAMILY_KABINI },
{ 0x9837, CHIP_FAMILY_KABINI },
{ 0x9838, CHIP_FAMILY_KABINI },
{ 0x9839, CHIP_FAMILY_KABINI },
{ 0x983A, CHIP_FAMILY_KABINI },
{ 0x983B, CHIP_FAMILY_KABINI },
{ 0x983C, CHIP_FAMILY_KABINI },
{ 0x983D, CHIP_FAMILY_KABINI },
{ 0x983E, CHIP_FAMILY_KABINI },
{ 0x983F, CHIP_FAMILY_KABINI },
{ 0x1304, CHIP_FAMILY_KAVERI },
{ 0x1305, CHIP_FAMILY_KAVERI },
{ 0x1306, CHIP_FAMILY_KAVERI },
{ 0x1307, CHIP_FAMILY_KAVERI },
{ 0x1309, CHIP_FAMILY_KAVERI },
{ 0x130A, CHIP_FAMILY_KAVERI },
{ 0x130B, CHIP_FAMILY_KAVERI },
{ 0x130C, CHIP_FAMILY_KAVERI },
{ 0x130D, CHIP_FAMILY_KAVERI },
{ 0x130E, CHIP_FAMILY_KAVERI },
{ 0x130F, CHIP_FAMILY_KAVERI },
{ 0x1310, CHIP_FAMILY_KAVERI },
{ 0x1311, CHIP_FAMILY_KAVERI },
{ 0x1312, CHIP_FAMILY_KAVERI },
{ 0x1313, CHIP_FAMILY_KAVERI },
{ 0x1315, CHIP_FAMILY_KAVERI },
{ 0x1316, CHIP_FAMILY_KAVERI },
{ 0x1317, CHIP_FAMILY_KAVERI },
{ 0x131B, CHIP_FAMILY_KAVERI },
{ 0x131C, CHIP_FAMILY_KAVERI },
{ 0x131D, CHIP_FAMILY_KAVERI },
{ 0x67A0, CHIP_FAMILY_HAWAII },
{ 0x67A1, CHIP_FAMILY_HAWAII },
{ 0x67A2, CHIP_FAMILY_HAWAII },
{ 0x67A8, CHIP_FAMILY_HAWAII },
{ 0x67A9, CHIP_FAMILY_HAWAII },
{ 0x67AA, CHIP_FAMILY_HAWAII },
{ 0x67B0, CHIP_FAMILY_HAWAII },
{ 0x67B1, CHIP_FAMILY_HAWAII },
{ 0x67B8, CHIP_FAMILY_HAWAII },
{ 0x67B9, CHIP_FAMILY_HAWAII },
{ 0x67BA, CHIP_FAMILY_HAWAII },
{ 0x67BE, CHIP_FAMILY_HAWAII },
{ 0x6900, CHIP_FAMILY_TOPAZ },
{ 0x6901, CHIP_FAMILY_TOPAZ },
{ 0x6902, CHIP_FAMILY_TOPAZ },
{ 0x6903, CHIP_FAMILY_TOPAZ },
{ 0x6907, CHIP_FAMILY_TOPAZ },
{ 0x6920, CHIP_FAMILY_TONGA },
{ 0x6921, CHIP_FAMILY_TONGA },
{ 0x6938, CHIP_FAMILY_TONGA },
{ 0x6939, CHIP_FAMILY_TONGA },
{ 0x692B, CHIP_FAMILY_TONGA },
{ 0x692F, CHIP_FAMILY_TONGA },
{ 0x9870, CHIP_FAMILY_CARRIZO },
{ 0x9874, CHIP_FAMILY_CARRIZO },
{ 0x9875, CHIP_FAMILY_CARRIZO },
{ 0x9876, CHIP_FAMILY_CARRIZO },
{ 0x9877, CHIP_FAMILY_CARRIZO },
};

77
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/* This file is autogenerated please do not edit */
SymTabRec AMDGPUChipsets[] = {
{ PCI_CHIP_BONAIRE_6640, "BONAIRE" },
{ PCI_CHIP_BONAIRE_6641, "BONAIRE" },
{ PCI_CHIP_BONAIRE_6649, "BONAIRE" },
{ PCI_CHIP_BONAIRE_6650, "BONAIRE" },
{ PCI_CHIP_BONAIRE_6651, "BONAIRE" },
{ PCI_CHIP_BONAIRE_6658, "BONAIRE" },
{ PCI_CHIP_BONAIRE_665C, "BONAIRE" },
{ PCI_CHIP_BONAIRE_665D, "BONAIRE" },
{ PCI_CHIP_KABINI_9830, "KABINI" },
{ PCI_CHIP_KABINI_9831, "KABINI" },
{ PCI_CHIP_KABINI_9832, "KABINI" },
{ PCI_CHIP_KABINI_9833, "KABINI" },
{ PCI_CHIP_KABINI_9834, "KABINI" },
{ PCI_CHIP_KABINI_9835, "KABINI" },
{ PCI_CHIP_KABINI_9836, "KABINI" },
{ PCI_CHIP_KABINI_9837, "KABINI" },
{ PCI_CHIP_KABINI_9838, "KABINI" },
{ PCI_CHIP_KABINI_9839, "KABINI" },
{ PCI_CHIP_KABINI_983A, "KABINI" },
{ PCI_CHIP_KABINI_983B, "KABINI" },
{ PCI_CHIP_KABINI_983C, "KABINI" },
{ PCI_CHIP_KABINI_983D, "KABINI" },
{ PCI_CHIP_KABINI_983E, "KABINI" },
{ PCI_CHIP_KABINI_983F, "KABINI" },
{ PCI_CHIP_KAVERI_1304, "KAVERI" },
{ PCI_CHIP_KAVERI_1305, "KAVERI" },
{ PCI_CHIP_KAVERI_1306, "KAVERI" },
{ PCI_CHIP_KAVERI_1307, "KAVERI" },
{ PCI_CHIP_KAVERI_1309, "KAVERI" },
{ PCI_CHIP_KAVERI_130A, "KAVERI" },
{ PCI_CHIP_KAVERI_130B, "KAVERI" },
{ PCI_CHIP_KAVERI_130C, "KAVERI" },
{ PCI_CHIP_KAVERI_130D, "KAVERI" },
{ PCI_CHIP_KAVERI_130E, "KAVERI" },
{ PCI_CHIP_KAVERI_130F, "KAVERI" },
{ PCI_CHIP_KAVERI_1310, "KAVERI" },
{ PCI_CHIP_KAVERI_1311, "KAVERI" },
{ PCI_CHIP_KAVERI_1312, "KAVERI" },
{ PCI_CHIP_KAVERI_1313, "KAVERI" },
{ PCI_CHIP_KAVERI_1315, "KAVERI" },
{ PCI_CHIP_KAVERI_1316, "KAVERI" },
{ PCI_CHIP_KAVERI_1317, "KAVERI" },
{ PCI_CHIP_KAVERI_131B, "KAVERI" },
{ PCI_CHIP_KAVERI_131C, "KAVERI" },
{ PCI_CHIP_KAVERI_131D, "KAVERI" },
{ PCI_CHIP_HAWAII_67A0, "HAWAII" },
{ PCI_CHIP_HAWAII_67A1, "HAWAII" },
{ PCI_CHIP_HAWAII_67A2, "HAWAII" },
{ PCI_CHIP_HAWAII_67A8, "HAWAII" },
{ PCI_CHIP_HAWAII_67A9, "HAWAII" },
{ PCI_CHIP_HAWAII_67AA, "HAWAII" },
{ PCI_CHIP_HAWAII_67B0, "HAWAII" },
{ PCI_CHIP_HAWAII_67B1, "HAWAII" },
{ PCI_CHIP_HAWAII_67B8, "HAWAII" },
{ PCI_CHIP_HAWAII_67B9, "HAWAII" },
{ PCI_CHIP_HAWAII_67BA, "HAWAII" },
{ PCI_CHIP_HAWAII_67BE, "HAWAII" },
{ PCI_CHIP_TOPAZ_6900, "TOPAZ" },
{ PCI_CHIP_TOPAZ_6901, "TOPAZ" },
{ PCI_CHIP_TOPAZ_6902, "TOPAZ" },
{ PCI_CHIP_TOPAZ_6903, "TOPAZ" },
{ PCI_CHIP_TOPAZ_6907, "TOPAZ" },
{ PCI_CHIP_TONGA_6920, "TONGA" },
{ PCI_CHIP_TONGA_6921, "TONGA" },
{ PCI_CHIP_TONGA_6938, "TONGA" },
{ PCI_CHIP_TONGA_6939, "TONGA" },
{ PCI_CHIP_TONGA_692B, "TONGA" },
{ PCI_CHIP_TONGA_692F, "TONGA" },
{ PCI_CHIP_CARRIZO_9870, "CARRIZO" },
{ PCI_CHIP_CARRIZO_9874, "CARRIZO" },
{ PCI_CHIP_CARRIZO_9875, "CARRIZO" },
{ PCI_CHIP_CARRIZO_9876, "CARRIZO" },
{ PCI_CHIP_CARRIZO_9877, "CARRIZO" },
{ -1, NULL }
};

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/*
* Copyright 2008 Jerome Glisse
*
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation on the rights to use, copy, modify, merge,
* publish, distribute, sublicense, and/or sell copies of the Software,
* and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial
* portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR
* THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifndef AMDGPU_DRI2_H
#define AMDGPU_DRI2_H
#include <xorg-server.h>
struct amdgpu_dri2 {
drmVersionPtr pKernelDRMVersion;
int drm_fd;
Bool available;
Bool enabled;
char *device_name;
};
#ifdef DRI2
#include "dri2.h"
Bool amdgpu_dri2_screen_init(ScreenPtr pScreen);
void amdgpu_dri2_close_screen(ScreenPtr pScreen);
int drmmode_get_crtc_id(xf86CrtcPtr crtc);
void amdgpu_dri2_frame_event_handler(unsigned int frame, unsigned int tv_sec,
unsigned int tv_usec, void *event_data);
void amdgpu_dri2_flip_event_handler(unsigned int frame, unsigned int tv_sec,
unsigned int tv_usec, void *event_data);
#else
static inline Bool amdgpu_dri2_screen_init(ScreenPtr pScreen)
{
return FALSE;
}
static inline void amdgpu_dri2_close_screen(ScreenPtr pScreen)
{
}
static inline void
amdgpu_dri2_dummy_event_handler(unsigned int frame, unsigned int tv_sec,
unsigned int tv_usec, void *event_data,
const char *name)
{
static Bool warned;
if (!warned) {
ErrorF("%s called but DRI2 disabled at build time\n", name);
warned = TRUE;
}
free(event_data);
}
static inline void
amdgpu_dri2_frame_event_handler(unsigned int frame, unsigned int tv_sec,
unsigned int tv_usec, void *event_data)
{
amdgpu_dri2_dummy_event_handler(frame, tv_sec, tv_usec, event_data,
__func__);
}
static inline void
amdgpu_dri2_flip_event_handler(unsigned int frame, unsigned int tv_sec,
unsigned int tv_usec, void *event_data)
{
amdgpu_dri2_dummy_event_handler(frame, tv_sec, tv_usec, event_data,
__func__);
}
#endif
#endif /* AMDGPU_DRI2_H */

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/*
* Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
* VA Linux Systems Inc., Fremont, California.
*
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation on the rights to use, copy, modify, merge,
* publish, distribute, sublicense, and/or sell copies of the Software,
* and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial
* portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR
* THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
/*
* Authors:
* Kevin E. Martin <martin@xfree86.org>
* Rickard E. Faith <faith@valinux.com>
* Alan Hourihane <alanh@fairlite.demon.co.uk>
*
*/
#ifndef _AMDGPU_DRV_H_
#define _AMDGPU_DRV_H_
#include <stdlib.h> /* For abs() */
#include <unistd.h> /* For usleep() */
#include <sys/time.h> /* For gettimeofday() */
#include "config.h"
#include "xf86str.h"
#include "compiler.h"
/* PCI support */
#include "xf86Pci.h"
#include "fb.h"
#include "amdgpu_glamor.h"
/* Cursor Support */
#include "xf86Cursor.h"
/* DDC support */
#include "xf86DDC.h"
/* Xv support */
#include "xf86xv.h"
#include "amdgpu_probe.h"
/* DRI support */
#include "xf86drm.h"
#include "amdgpu_drm.h"
#ifdef DAMAGE
#include "damage.h"
#include "globals.h"
#endif
#include "xf86Crtc.h"
#include "X11/Xatom.h"
#include "amdgpu_dri2.h"
#include "drmmode_display.h"
#include "amdgpu_bo_helper.h"
/* Render support */
#ifdef RENDER
#include "picturestr.h"
#endif
#include "compat-api.h"
#include "simple_list.h"
#include "amdpciids.h"
#ifndef MAX
#define MAX(a,b) ((a)>(b)?(a):(b))
#endif
#ifndef MIN
#define MIN(a,b) ((a)>(b)?(b):(a))
#endif
#if HAVE_BYTESWAP_H
#include <byteswap.h>
#elif defined(USE_SYS_ENDIAN_H)
#include <sys/endian.h>
#else
#define bswap_16(value) \
((((value) & 0xff) << 8) | ((value) >> 8))
#define bswap_32(value) \
(((uint32_t)bswap_16((uint16_t)((value) & 0xffff)) << 16) | \
(uint32_t)bswap_16((uint16_t)((value) >> 16)))
#define bswap_64(value) \
(((uint64_t)bswap_32((uint32_t)((value) & 0xffffffff)) \
<< 32) | \
(uint64_t)bswap_32((uint32_t)((value) >> 32)))
#endif
#if X_BYTE_ORDER == X_BIG_ENDIAN
#define le32_to_cpu(x) bswap_32(x)
#define le16_to_cpu(x) bswap_16(x)
#define cpu_to_le32(x) bswap_32(x)
#define cpu_to_le16(x) bswap_16(x)
#else
#define le32_to_cpu(x) (x)
#define le16_to_cpu(x) (x)
#define cpu_to_le32(x) (x)
#define cpu_to_le16(x) (x)
#endif
/* Provide substitutes for gcc's __FUNCTION__ on other compilers */
#if !defined(__GNUC__) && !defined(__FUNCTION__)
#define __FUNCTION__ __func__ /* C99 */
#endif
typedef enum {
OPTION_NOACCEL,
OPTION_SW_CURSOR,
OPTION_PAGE_FLIP,
#ifdef RENDER
OPTION_SUBPIXEL_ORDER,
#endif
OPTION_ZAPHOD_HEADS,
OPTION_ACCEL_METHOD
} AMDGPUOpts;
#define AMDGPU_VSYNC_TIMEOUT 20000 /* Maximum wait for VSYNC (in usecs) */
/* Buffer are aligned on 4096 byte boundaries */
#define AMDGPU_GPU_PAGE_SIZE 4096
#define AMDGPU_BUFFER_ALIGN (AMDGPU_GPU_PAGE_SIZE - 1)
#define xFixedToFloat(f) (((float) (f)) / 65536)
#define AMDGPU_LOGLEVEL_DEBUG 4
/* Other macros */
#define AMDGPU_ARRAY_SIZE(x) (sizeof(x)/sizeof(x[0]))
#define AMDGPU_ALIGN(x,bytes) (((x) + ((bytes) - 1)) & ~((bytes) - 1))
#define AMDGPUPTR(pScrn) ((AMDGPUInfoPtr)(pScrn)->driverPrivate)
#define CURSOR_WIDTH 64
#define CURSOR_HEIGHT 64
#define CURSOR_WIDTH_CIK 128
#define CURSOR_HEIGHT_CIK 128
#define AMDGPU_BO_FLAGS_GBM 0x1
struct amdgpu_buffer {
union {
struct gbm_bo *gbm;
amdgpu_bo_handle amdgpu;
} bo;
void *cpu_ptr;
uint32_t ref_count;
uint32_t flags;
};
typedef struct {
EntityInfoPtr pEnt;
pciVideoPtr PciInfo;
int Chipset;
AMDGPUChipFamily ChipFamily;
struct gbm_device *gbm;
Bool(*CloseScreen) (CLOSE_SCREEN_ARGS_DECL);
void (*BlockHandler) (BLOCKHANDLER_ARGS_DECL);
int pix24bpp; /* Depth of pixmap for 24bpp fb */
Bool dac6bits; /* Use 6 bit DAC? */
int pixel_bytes;
Bool directRenderingEnabled;
struct amdgpu_dri2 dri2;
/* accel */
Bool use_glamor;
/* general */
OptionInfoPtr Options;
DisplayModePtr currentMode;
CreateScreenResourcesProcPtr CreateScreenResources;
Bool IsSecondary;
Bool IsPrimary;
Bool shadow_fb;
void *fb_shadow;
struct amdgpu_buffer *front_buffer;
struct amdgpu_buffer *cursor_buffer[32];
uint64_t vram_size;
uint64_t gart_size;
drmmode_rec drmmode;
Bool drmmode_inited;
/* r6xx+ tile config */
Bool have_tiling_info;
int group_bytes;
/* kms pageflipping */
Bool allowPageFlip;
/* cursor size */
int cursor_w;
int cursor_h;
} AMDGPUInfoRec, *AMDGPUInfoPtr;
/* amdgpu_video.c */
extern void AMDGPUInitVideo(ScreenPtr pScreen);
extern void AMDGPUResetVideo(ScrnInfoPtr pScrn);
extern xf86CrtcPtr amdgpu_pick_best_crtc(ScrnInfoPtr pScrn,
Bool consider_disabled,
int x1, int x2, int y1, int y2);
extern AMDGPUEntPtr AMDGPUEntPriv(ScrnInfoPtr pScrn);
drmVBlankSeqType amdgpu_populate_vbl_request_type(xf86CrtcPtr crtc);
#endif /* _AMDGPU_DRV_H_ */

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/*
* Copyright © 2011 Intel Corporation.
* 2012 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use, copy,
* modify, merge, publish, distribute, sublicense, and/or sell copies
* of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including
* the next paragraph) shall be included in all copies or substantial
* portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include <xf86.h>
#define GLAMOR_FOR_XORG 1
#include <glamor.h>
#include "amdgpu_bo_helper.h"
#include "amdgpu_pixmap.h"
#include <gbm.h>
#if HAS_DEVPRIVATEKEYREC
DevPrivateKeyRec amdgpu_pixmap_index;
#else
int amdgpu_pixmap_index;
#endif
void amdgpu_glamor_exchange_buffers(PixmapPtr src, PixmapPtr dst)
{
AMDGPUInfoPtr info = AMDGPUPTR(xf86ScreenToScrn(dst->drawable.pScreen));
if (!info->use_glamor)
return;
glamor_egl_exchange_buffers(src, dst);
}
Bool amdgpu_glamor_create_screen_resources(ScreenPtr screen)
{
ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
AMDGPUInfoPtr info = AMDGPUPTR(scrn);
union gbm_bo_handle bo_handle;
if (!info->use_glamor)
return TRUE;
if (!glamor_glyphs_init(screen))
return FALSE;
bo_handle = gbm_bo_get_handle(info->front_buffer->bo.gbm);
if (!glamor_egl_create_textured_screen_ext(screen,
bo_handle.u32,
scrn->displayWidth *
info->pixel_bytes, NULL)) {
return FALSE;
}
return TRUE;
}
Bool amdgpu_glamor_pre_init(ScrnInfoPtr scrn)
{
AMDGPUInfoPtr info = AMDGPUPTR(scrn);
pointer glamor_module;
CARD32 version;
if (!info->dri2.available)
return FALSE;
if (scrn->depth < 24) {
xf86DrvMsg(scrn->scrnIndex, X_ERROR,
"glamor requires depth >= 24, disabling.\n");
return FALSE;
}
#if XORG_VERSION_CURRENT < XORG_VERSION_NUMERIC(1,15,0,0,0)
if (!xf86LoaderCheckSymbol("glamor_egl_init")) {
xf86DrvMsg(scrn->scrnIndex, X_ERROR,
"glamor requires Load \"glamoregl\" in "
"Section \"Module\", disabling.\n");
return FALSE;
}
#endif
/* Load glamor module */
if ((glamor_module = xf86LoadSubModule(scrn, GLAMOR_EGL_MODULE_NAME))) {
version = xf86GetModuleVersion(glamor_module);
if (version < MODULE_VERSION_NUMERIC(0, 3, 1)) {
xf86DrvMsg(scrn->scrnIndex, X_ERROR,
"Incompatible glamor version, required >= 0.3.0.\n");
return FALSE;
} else {
if (glamor_egl_init(scrn, info->dri2.drm_fd)) {
xf86DrvMsg(scrn->scrnIndex, X_INFO,
"glamor detected, initialising EGL layer.\n");
} else {
xf86DrvMsg(scrn->scrnIndex, X_ERROR,
"glamor detected, failed to initialize EGL.\n");
return FALSE;
}
}
} else {
xf86DrvMsg(scrn->scrnIndex, X_ERROR, "glamor not available\n");
return FALSE;
}
info->use_glamor = TRUE;
return TRUE;
}
Bool amdgpu_glamor_create_textured_pixmap(PixmapPtr pixmap)
{
ScrnInfoPtr scrn = xf86ScreenToScrn(pixmap->drawable.pScreen);
AMDGPUInfoPtr info = AMDGPUPTR(scrn);
struct amdgpu_pixmap *priv;
union gbm_bo_handle bo_handle;
if ((info->use_glamor) == 0)
return TRUE;
priv = amdgpu_get_pixmap_private(pixmap);
if (!priv->stride) {
priv->stride = pixmap->devKind;
}
bo_handle = gbm_bo_get_handle(priv->bo->bo.gbm);
if (glamor_egl_create_textured_pixmap(pixmap, bo_handle.u32,
priv->stride)) {
return TRUE;
} else {
return FALSE;
}
}
Bool amdgpu_glamor_pixmap_is_offscreen(PixmapPtr pixmap)
{
struct amdgpu_pixmap *priv = amdgpu_get_pixmap_private(pixmap);
return priv && priv->bo;
}
#ifndef CREATE_PIXMAP_USAGE_SHARED
#define CREATE_PIXMAP_USAGE_SHARED AMDGPU_CREATE_PIXMAP_DRI2
#endif
#define AMDGPU_CREATE_PIXMAP_SHARED(usage) \
((usage) & AMDGPU_CREATE_PIXMAP_DRI2 || (usage) == CREATE_PIXMAP_USAGE_SHARED)
static PixmapPtr
amdgpu_glamor_create_pixmap(ScreenPtr screen, int w, int h, int depth,
unsigned usage)
{
ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
struct amdgpu_pixmap *priv;
PixmapPtr pixmap, new_pixmap = NULL;
if (!AMDGPU_CREATE_PIXMAP_SHARED(usage)) {
pixmap = glamor_create_pixmap(screen, w, h, depth, usage);
if (pixmap)
return pixmap;
}
if (w > 32767 || h > 32767)
return NullPixmap;
if (depth == 1)
return fbCreatePixmap(screen, w, h, depth, usage);
if (usage == CREATE_PIXMAP_USAGE_GLYPH_PICTURE && w <= 32 && h <= 32)
return fbCreatePixmap(screen, w, h, depth, usage);
pixmap = fbCreatePixmap(screen, 0, 0, depth, usage);
if (pixmap == NullPixmap)
return pixmap;
if (w && h) {
priv = calloc(1, sizeof(struct amdgpu_pixmap));
if (priv == NULL)
goto fallback_pixmap;
priv->bo = amdgpu_alloc_pixmap_bo(scrn, w, h, depth, usage,
pixmap->drawable.bitsPerPixel,
&priv->stride);
if (!priv->bo)
goto fallback_priv;
amdgpu_set_pixmap_private(pixmap, priv);
screen->ModifyPixmapHeader(pixmap, w, h, 0, 0, priv->stride,
NULL);
if (!amdgpu_glamor_create_textured_pixmap(pixmap))
goto fallback_glamor;
}
return pixmap;
fallback_glamor:
if (AMDGPU_CREATE_PIXMAP_SHARED(usage)) {
/* XXX need further work to handle the DRI2 failure case.
* Glamor don't know how to handle a BO only pixmap. Put
* a warning indicator here.
*/
xf86DrvMsg(scrn->scrnIndex, X_WARNING,
"Failed to create textured DRI2/PRIME pixmap.");
return pixmap;
}
/* Create textured pixmap failed means glamor failed to
* create a texture from current BO for some reasons. We turn
* to create a new glamor pixmap and clean up current one.
* One thing need to be noted, this new pixmap doesn't
* has a priv and bo attached to it. It's glamor's responsbility
* to take care of it. Glamor will mark this new pixmap as a
* texture only pixmap and will never fallback to DDX layer
* afterwards.
*/
new_pixmap = glamor_create_pixmap(screen, w, h, depth, usage);
amdgpu_bo_unref(&priv->bo);
fallback_priv:
free(priv);
fallback_pixmap:
fbDestroyPixmap(pixmap);
if (new_pixmap)
return new_pixmap;
else
return fbCreatePixmap(screen, w, h, depth, usage);
}
static Bool amdgpu_glamor_destroy_pixmap(PixmapPtr pixmap)
{
if (pixmap->refcnt == 1) {
glamor_egl_destroy_textured_pixmap(pixmap);
amdgpu_set_pixmap_bo(pixmap, NULL);
}
fbDestroyPixmap(pixmap);
return TRUE;
}
#ifdef AMDGPU_PIXMAP_SHARING
static Bool
amdgpu_glamor_share_pixmap_backing(PixmapPtr pixmap, ScreenPtr slave,
void **handle_p)
{
struct amdgpu_pixmap *priv = amdgpu_get_pixmap_private(pixmap);
if (!priv)
return FALSE;
return amdgpu_share_pixmap_backing(priv->bo, handle_p);
}
static Bool
amdgpu_glamor_set_shared_pixmap_backing(PixmapPtr pixmap, void *handle)
{
ScreenPtr screen = pixmap->drawable.pScreen;
ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
struct amdgpu_pixmap *priv;
if (!amdgpu_set_shared_pixmap_backing(pixmap, handle))
return FALSE;
priv = amdgpu_get_pixmap_private(pixmap);
priv->stride = pixmap->devKind;
if (!amdgpu_glamor_create_textured_pixmap(pixmap)) {
xf86DrvMsg(scrn->scrnIndex, X_ERROR,
"Failed to get PRIME drawable for glamor pixmap.\n");
return FALSE;
}
screen->ModifyPixmapHeader(pixmap,
pixmap->drawable.width,
pixmap->drawable.height,
0, 0, priv->stride, NULL);
return TRUE;
}
#endif /* AMDGPU_PIXMAP_SHARING */
Bool amdgpu_glamor_init(ScreenPtr screen)
{
ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
if (!glamor_init
(screen,
GLAMOR_INVERTED_Y_AXIS | GLAMOR_USE_EGL_SCREEN | GLAMOR_USE_SCREEN
#ifdef GLAMOR_NO_DRI3
| GLAMOR_NO_DRI3
#endif
| GLAMOR_USE_PICTURE_SCREEN)) {
xf86DrvMsg(scrn->scrnIndex, X_ERROR,
"Failed to initialize glamor.\n");
return FALSE;
}
if (!glamor_egl_init_textured_pixmap(screen)) {
xf86DrvMsg(scrn->scrnIndex, X_ERROR,
"Failed to initialize textured pixmap of screen for glamor.\n");
return FALSE;
}
#if HAS_DIXREGISTERPRIVATEKEY
if (!dixRegisterPrivateKey(&amdgpu_pixmap_index, PRIVATE_PIXMAP, 0))
#else
if (!dixRequestPrivate(&amdgpu_pixmap_index, 0))
#endif
return FALSE;
screen->CreatePixmap = amdgpu_glamor_create_pixmap;
screen->DestroyPixmap = amdgpu_glamor_destroy_pixmap;
#ifdef AMDGPU_PIXMAP_SHARING
screen->SharePixmapBacking = amdgpu_glamor_share_pixmap_backing;
screen->SetSharedPixmapBacking =
amdgpu_glamor_set_shared_pixmap_backing;
#endif
xf86DrvMsg(scrn->scrnIndex, X_INFO, "Use GLAMOR acceleration.\n");
return TRUE;
}
void amdgpu_glamor_flush(ScrnInfoPtr pScrn)
{
AMDGPUInfoPtr info = AMDGPUPTR(pScrn);
if (info->use_glamor)
glamor_block_handler(pScrn->pScreen);
}
XF86VideoAdaptorPtr amdgpu_glamor_xv_init(ScreenPtr pScreen, int num_adapt)
{
return glamor_xv_init(pScreen, num_adapt);
}

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/*
* Copyright © 2011 Intel Corporation.
* 2012 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use, copy,
* modify, merge, publish, distribute, sublicense, and/or sell copies
* of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including
* the next paragraph) shall be included in all copies or substantial
* portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifndef AMDGPU_GLAMOR_H
#define AMDGPU_GLAMOR_H
#include "xf86xv.h"
Bool amdgpu_glamor_pre_init(ScrnInfoPtr scrn);
Bool amdgpu_glamor_init(ScreenPtr screen);
Bool amdgpu_glamor_create_screen_resources(ScreenPtr screen);
void amdgpu_glamor_free_screen(int scrnIndex, int flags);
void amdgpu_glamor_flush(ScrnInfoPtr pScrn);
Bool amdgpu_glamor_create_textured_pixmap(PixmapPtr pixmap);
void amdgpu_glamor_exchange_buffers(PixmapPtr src, PixmapPtr dst);
Bool amdgpu_glamor_pixmap_is_offscreen(PixmapPtr pixmap);
XF86VideoAdaptorPtr amdgpu_glamor_xv_init(ScreenPtr pScreen, int num_adapt);
#endif /* AMDGPU_GLAMOR_H */

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/*
* Copyright 2000 through 2004 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
*
* Permission to use, copy, modify, distribute, and sell this software and its
* documentation for any purpose is hereby granted without fee, provided that
* the above copyright notice appear in all copies and that both that copyright
* notice and this permission notice appear in supporting documentation, and
* that the name of Marc Aurele La France not be used in advertising or
* publicity pertaining to distribution of the software without specific,
* written prior permission. Marc Aurele La France makes no representations
* about the suitability of this software for any purpose. It is provided
* "as-is" without express or implied warranty.
*
* MARC AURELE LA FRANCE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO
* EVENT SHALL MARC AURELE LA FRANCE BE LIABLE FOR ANY SPECIAL, INDIRECT OR
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
* DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include "amdgpu_probe.h"
#include "amdgpu_version.h"
#include "xf86.h"
/* Module loader interface for subsidiary driver module */
static XF86ModuleVersionInfo AMDGPUVersionRec = {
AMDGPU_DRIVER_NAME,
MODULEVENDORSTRING,
MODINFOSTRING1,
MODINFOSTRING2,
XORG_VERSION_CURRENT,
AMDGPU_VERSION_MAJOR, AMDGPU_VERSION_MINOR, AMDGPU_VERSION_PATCH,
ABI_CLASS_VIDEODRV,
ABI_VIDEODRV_VERSION,
MOD_CLASS_VIDEODRV,
{0, 0, 0, 0}
};
/*
* AMDGPUSetup --
*
* This function is called every time the module is loaded.
*/
static pointer
AMDGPUSetup(pointer Module, pointer Options, int *ErrorMajor, int *ErrorMinor)
{
static Bool Inited = FALSE;
if (!Inited) {
Inited = TRUE;
xf86AddDriver(&AMDGPU, Module, HaveDriverFuncs);
}
return (pointer) TRUE;
}
/* The following record must be called amdgpuModuleData */
_X_EXPORT XF86ModuleData amdgpuModuleData = {
&AMDGPUVersionRec,
AMDGPUSetup,
NULL
};

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@@ -0,0 +1,77 @@
/* This file is autogenerated please do not edit */
static PciChipsets AMDGPUPciChipsets[] = {
{ PCI_CHIP_BONAIRE_6640, PCI_CHIP_BONAIRE_6640, RES_SHARED_VGA },
{ PCI_CHIP_BONAIRE_6641, PCI_CHIP_BONAIRE_6641, RES_SHARED_VGA },
{ PCI_CHIP_BONAIRE_6649, PCI_CHIP_BONAIRE_6649, RES_SHARED_VGA },
{ PCI_CHIP_BONAIRE_6650, PCI_CHIP_BONAIRE_6650, RES_SHARED_VGA },
{ PCI_CHIP_BONAIRE_6651, PCI_CHIP_BONAIRE_6651, RES_SHARED_VGA },
{ PCI_CHIP_BONAIRE_6658, PCI_CHIP_BONAIRE_6658, RES_SHARED_VGA },
{ PCI_CHIP_BONAIRE_665C, PCI_CHIP_BONAIRE_665C, RES_SHARED_VGA },
{ PCI_CHIP_BONAIRE_665D, PCI_CHIP_BONAIRE_665D, RES_SHARED_VGA },
{ PCI_CHIP_KABINI_9830, PCI_CHIP_KABINI_9830, RES_SHARED_VGA },
{ PCI_CHIP_KABINI_9831, PCI_CHIP_KABINI_9831, RES_SHARED_VGA },
{ PCI_CHIP_KABINI_9832, PCI_CHIP_KABINI_9832, RES_SHARED_VGA },
{ PCI_CHIP_KABINI_9833, PCI_CHIP_KABINI_9833, RES_SHARED_VGA },
{ PCI_CHIP_KABINI_9834, PCI_CHIP_KABINI_9834, RES_SHARED_VGA },
{ PCI_CHIP_KABINI_9835, PCI_CHIP_KABINI_9835, RES_SHARED_VGA },
{ PCI_CHIP_KABINI_9836, PCI_CHIP_KABINI_9836, RES_SHARED_VGA },
{ PCI_CHIP_KABINI_9837, PCI_CHIP_KABINI_9837, RES_SHARED_VGA },
{ PCI_CHIP_KABINI_9838, PCI_CHIP_KABINI_9838, RES_SHARED_VGA },
{ PCI_CHIP_KABINI_9839, PCI_CHIP_KABINI_9839, RES_SHARED_VGA },
{ PCI_CHIP_KABINI_983A, PCI_CHIP_KABINI_983A, RES_SHARED_VGA },
{ PCI_CHIP_KABINI_983B, PCI_CHIP_KABINI_983B, RES_SHARED_VGA },
{ PCI_CHIP_KABINI_983C, PCI_CHIP_KABINI_983C, RES_SHARED_VGA },
{ PCI_CHIP_KABINI_983D, PCI_CHIP_KABINI_983D, RES_SHARED_VGA },
{ PCI_CHIP_KABINI_983E, PCI_CHIP_KABINI_983E, RES_SHARED_VGA },
{ PCI_CHIP_KABINI_983F, PCI_CHIP_KABINI_983F, RES_SHARED_VGA },
{ PCI_CHIP_KAVERI_1304, PCI_CHIP_KAVERI_1304, RES_SHARED_VGA },
{ PCI_CHIP_KAVERI_1305, PCI_CHIP_KAVERI_1305, RES_SHARED_VGA },
{ PCI_CHIP_KAVERI_1306, PCI_CHIP_KAVERI_1306, RES_SHARED_VGA },
{ PCI_CHIP_KAVERI_1307, PCI_CHIP_KAVERI_1307, RES_SHARED_VGA },
{ PCI_CHIP_KAVERI_1309, PCI_CHIP_KAVERI_1309, RES_SHARED_VGA },
{ PCI_CHIP_KAVERI_130A, PCI_CHIP_KAVERI_130A, RES_SHARED_VGA },
{ PCI_CHIP_KAVERI_130B, PCI_CHIP_KAVERI_130B, RES_SHARED_VGA },
{ PCI_CHIP_KAVERI_130C, PCI_CHIP_KAVERI_130C, RES_SHARED_VGA },
{ PCI_CHIP_KAVERI_130D, PCI_CHIP_KAVERI_130D, RES_SHARED_VGA },
{ PCI_CHIP_KAVERI_130E, PCI_CHIP_KAVERI_130E, RES_SHARED_VGA },
{ PCI_CHIP_KAVERI_130F, PCI_CHIP_KAVERI_130F, RES_SHARED_VGA },
{ PCI_CHIP_KAVERI_1310, PCI_CHIP_KAVERI_1310, RES_SHARED_VGA },
{ PCI_CHIP_KAVERI_1311, PCI_CHIP_KAVERI_1311, RES_SHARED_VGA },
{ PCI_CHIP_KAVERI_1312, PCI_CHIP_KAVERI_1312, RES_SHARED_VGA },
{ PCI_CHIP_KAVERI_1313, PCI_CHIP_KAVERI_1313, RES_SHARED_VGA },
{ PCI_CHIP_KAVERI_1315, PCI_CHIP_KAVERI_1315, RES_SHARED_VGA },
{ PCI_CHIP_KAVERI_1316, PCI_CHIP_KAVERI_1316, RES_SHARED_VGA },
{ PCI_CHIP_KAVERI_1317, PCI_CHIP_KAVERI_1317, RES_SHARED_VGA },
{ PCI_CHIP_KAVERI_131B, PCI_CHIP_KAVERI_131B, RES_SHARED_VGA },
{ PCI_CHIP_KAVERI_131C, PCI_CHIP_KAVERI_131C, RES_SHARED_VGA },
{ PCI_CHIP_KAVERI_131D, PCI_CHIP_KAVERI_131D, RES_SHARED_VGA },
{ PCI_CHIP_HAWAII_67A0, PCI_CHIP_HAWAII_67A0, RES_SHARED_VGA },
{ PCI_CHIP_HAWAII_67A1, PCI_CHIP_HAWAII_67A1, RES_SHARED_VGA },
{ PCI_CHIP_HAWAII_67A2, PCI_CHIP_HAWAII_67A2, RES_SHARED_VGA },
{ PCI_CHIP_HAWAII_67A8, PCI_CHIP_HAWAII_67A8, RES_SHARED_VGA },
{ PCI_CHIP_HAWAII_67A9, PCI_CHIP_HAWAII_67A9, RES_SHARED_VGA },
{ PCI_CHIP_HAWAII_67AA, PCI_CHIP_HAWAII_67AA, RES_SHARED_VGA },
{ PCI_CHIP_HAWAII_67B0, PCI_CHIP_HAWAII_67B0, RES_SHARED_VGA },
{ PCI_CHIP_HAWAII_67B1, PCI_CHIP_HAWAII_67B1, RES_SHARED_VGA },
{ PCI_CHIP_HAWAII_67B8, PCI_CHIP_HAWAII_67B8, RES_SHARED_VGA },
{ PCI_CHIP_HAWAII_67B9, PCI_CHIP_HAWAII_67B9, RES_SHARED_VGA },
{ PCI_CHIP_HAWAII_67BA, PCI_CHIP_HAWAII_67BA, RES_SHARED_VGA },
{ PCI_CHIP_HAWAII_67BE, PCI_CHIP_HAWAII_67BE, RES_SHARED_VGA },
{ PCI_CHIP_TOPAZ_6900, PCI_CHIP_TOPAZ_6900, RES_SHARED_VGA },
{ PCI_CHIP_TOPAZ_6901, PCI_CHIP_TOPAZ_6901, RES_SHARED_VGA },
{ PCI_CHIP_TOPAZ_6902, PCI_CHIP_TOPAZ_6902, RES_SHARED_VGA },
{ PCI_CHIP_TOPAZ_6903, PCI_CHIP_TOPAZ_6903, RES_SHARED_VGA },
{ PCI_CHIP_TOPAZ_6907, PCI_CHIP_TOPAZ_6907, RES_SHARED_VGA },
{ PCI_CHIP_TONGA_6920, PCI_CHIP_TONGA_6920, RES_SHARED_VGA },
{ PCI_CHIP_TONGA_6921, PCI_CHIP_TONGA_6921, RES_SHARED_VGA },
{ PCI_CHIP_TONGA_6938, PCI_CHIP_TONGA_6938, RES_SHARED_VGA },
{ PCI_CHIP_TONGA_6939, PCI_CHIP_TONGA_6939, RES_SHARED_VGA },
{ PCI_CHIP_TONGA_692B, PCI_CHIP_TONGA_692B, RES_SHARED_VGA },
{ PCI_CHIP_TONGA_692F, PCI_CHIP_TONGA_692F, RES_SHARED_VGA },
{ PCI_CHIP_CARRIZO_9870, PCI_CHIP_CARRIZO_9870, RES_SHARED_VGA },
{ PCI_CHIP_CARRIZO_9874, PCI_CHIP_CARRIZO_9874, RES_SHARED_VGA },
{ PCI_CHIP_CARRIZO_9875, PCI_CHIP_CARRIZO_9875, RES_SHARED_VGA },
{ PCI_CHIP_CARRIZO_9876, PCI_CHIP_CARRIZO_9876, RES_SHARED_VGA },
{ PCI_CHIP_CARRIZO_9877, PCI_CHIP_CARRIZO_9877, RES_SHARED_VGA },
{ -1, -1, RES_UNDEFINED }
};

77
src/amdgpu_pci_device_match_gen.h Normal file
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/* This file is autogenerated please do not edit */
static const struct pci_id_match amdgpu_device_match[] = {
ATI_DEVICE_MATCH( PCI_CHIP_BONAIRE_6640, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_BONAIRE_6641, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_BONAIRE_6649, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_BONAIRE_6650, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_BONAIRE_6651, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_BONAIRE_6658, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_BONAIRE_665C, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_BONAIRE_665D, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KABINI_9830, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KABINI_9831, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KABINI_9832, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KABINI_9833, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KABINI_9834, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KABINI_9835, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KABINI_9836, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KABINI_9837, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KABINI_9838, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KABINI_9839, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KABINI_983A, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KABINI_983B, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KABINI_983C, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KABINI_983D, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KABINI_983E, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KABINI_983F, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_1304, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_1305, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_1306, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_1307, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_1309, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_130A, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_130B, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_130C, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_130D, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_130E, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_130F, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_1310, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_1311, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_1312, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_1313, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_1315, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_1316, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_1317, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_131B, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_131C, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_131D, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_HAWAII_67A0, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_HAWAII_67A1, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_HAWAII_67A2, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_HAWAII_67A8, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_HAWAII_67A9, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_HAWAII_67AA, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_HAWAII_67B0, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_HAWAII_67B1, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_HAWAII_67B8, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_HAWAII_67B9, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_HAWAII_67BA, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_HAWAII_67BE, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_TOPAZ_6900, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_TOPAZ_6901, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_TOPAZ_6902, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_TOPAZ_6903, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_TOPAZ_6907, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_TONGA_6920, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_TONGA_6921, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_TONGA_6938, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_TONGA_6939, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_TONGA_692B, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_TONGA_692F, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_CARRIZO_9870, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_CARRIZO_9874, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_CARRIZO_9875, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_CARRIZO_9876, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_CARRIZO_9877, 0 ),
{ 0, 0, 0 }
};

115
src/amdgpu_pixmap.c Normal file
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/* Copyright © 2014 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use, copy,
* modify, merge, publish, distribute, sublicense, and/or sell copies
* of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including
* the next paragraph) shall be included in all copies or substantial
* portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include <xf86.h>
#include "amdgpu_pixmap.h"
#include "amdgpu_bo_helper.h"
static PixmapPtr
amdgpu_pixmap_create(ScreenPtr screen, int w, int h, int depth, unsigned usage)
{
ScrnInfoPtr scrn;
struct amdgpu_pixmap *priv;
PixmapPtr pixmap;
AMDGPUInfoPtr info;
/* only DRI2 pixmap is suppported */
if (!(usage & AMDGPU_CREATE_PIXMAP_DRI2))
return fbCreatePixmap(screen, w, h, depth, usage);
if (w > 32767 || h > 32767)
return NullPixmap;
if (depth == 1)
return fbCreatePixmap(screen, w, h, depth, usage);
pixmap = fbCreatePixmap(screen, 0, 0, depth, usage);
if (pixmap == NullPixmap)
return pixmap;
if (w && h) {
priv = calloc(1, sizeof(struct amdgpu_pixmap));
if (priv == NULL)
goto fallback_pixmap;
scrn = xf86ScreenToScrn(screen);
info = AMDGPUPTR(scrn);
if (!info->use_glamor)
usage |= AMDGPU_CREATE_PIXMAP_LINEAR;
priv->bo = amdgpu_alloc_pixmap_bo(scrn, w, h, depth, usage,
pixmap->drawable.bitsPerPixel,
&priv->stride);
if (!priv->bo)
goto fallback_priv;
amdgpu_set_pixmap_private(pixmap, priv);
if (amdgpu_bo_map(scrn, priv->bo)) {
ErrorF("Failed to mmap the bo\n");
goto fallback_bo;
}
screen->ModifyPixmapHeader(pixmap, w, h,
0, 0, priv->stride,
priv->bo->cpu_ptr);
}
return pixmap;
fallback_bo:
amdgpu_bo_unref(&priv->bo);
fallback_priv:
free(priv);
fallback_pixmap:
fbDestroyPixmap(pixmap);
return fbCreatePixmap(screen, w, h, depth, usage);
}
static Bool amdgpu_pixmap_destroy(PixmapPtr pixmap)
{
if (pixmap->refcnt == 1) {
amdgpu_set_pixmap_bo(pixmap, NULL);
}
fbDestroyPixmap(pixmap);
return TRUE;
}
/* This should only be called when glamor is disabled */
Bool amdgpu_pixmap_init(ScreenPtr screen)
{
#if HAS_DIXREGISTERPRIVATEKEY
if (!dixRegisterPrivateKey(&amdgpu_pixmap_index, PRIVATE_PIXMAP, 0))
#else
if (!dixRequestPrivate(&amdgpu_pixmap_index, 0))
#endif
return FALSE;
screen->CreatePixmap = amdgpu_pixmap_create;
screen->DestroyPixmap = amdgpu_pixmap_destroy;
return TRUE;
}

110
src/amdgpu_pixmap.h Normal file
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/*
* Copyright © 2014 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use, copy,
* modify, merge, publish, distribute, sublicense, and/or sell copies
* of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including
* the next paragraph) shall be included in all copies or substantial
* portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifndef AMDGPU_PIXMAP_H
#define AMDGPU_PIXMAP_H
#include "amdgpu_drv.h"
struct amdgpu_pixmap {
struct amdgpu_buffer *bo;
int stride;
};
#if HAS_DEVPRIVATEKEYREC
extern DevPrivateKeyRec amdgpu_pixmap_index;
#else
extern int amdgpu_pixmap_index;
#endif
static inline struct amdgpu_pixmap *amdgpu_get_pixmap_private(PixmapPtr pixmap)
{
#if HAS_DEVPRIVATEKEYREC
return dixGetPrivate(&pixmap->devPrivates, &amdgpu_pixmap_index);
#else
return dixLookupPrivate(&pixmap->devPrivates, &amdgpu_pixmap_index);
#endif
}
static inline void amdgpu_set_pixmap_private(PixmapPtr pixmap,
struct amdgpu_pixmap *priv)
{
dixSetPrivate(&pixmap->devPrivates, &amdgpu_pixmap_index, priv);
}
#if XF86_CRTC_VERSION >= 5
#define AMDGPU_PIXMAP_SHARING 1
#endif
static inline void amdgpu_set_pixmap_bo(PixmapPtr pPix, struct amdgpu_buffer *bo)
{
struct amdgpu_pixmap *priv;
priv = amdgpu_get_pixmap_private(pPix);
if (priv == NULL && bo == NULL)
return;
if (priv) {
if (priv->bo == bo)
return;
if (priv->bo) {
amdgpu_bo_unref(&priv->bo);
}
if (!bo) {
free(priv);
priv = NULL;
}
}
if (bo) {
if (!priv) {
priv = calloc(1, sizeof(struct amdgpu_pixmap));
if (!priv)
goto out;
}
amdgpu_bo_ref(bo);
priv->bo = bo;
}
out:
amdgpu_set_pixmap_private(pPix, priv);
}
static inline struct amdgpu_buffer *amdgpu_get_pixmap_bo(PixmapPtr pPix)
{
struct amdgpu_pixmap *priv;
priv = amdgpu_get_pixmap_private(pPix);
return priv ? priv->bo : NULL;
}
enum {
AMDGPU_CREATE_PIXMAP_DRI2 = 0x08000000,
AMDGPU_CREATE_PIXMAP_LINEAR = 0x04000000
};
extern Bool amdgpu_pixmap_init(ScreenPtr screen);
#endif /* AMDGPU_PIXMAP_H */

374
src/amdgpu_probe.c Normal file
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/*
* Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
* VA Linux Systems Inc., Fremont, California.
*
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation on the rights to use, copy, modify, merge,
* publish, distribute, sublicense, and/or sell copies of the Software,
* and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial
* portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR
* THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include <errno.h>
#include <string.h>
#include <stdlib.h>
/*
* Authors:
* Kevin E. Martin <martin@xfree86.org>
* Rickard E. Faith <faith@valinux.com>
* KMS support - Dave Airlie <airlied@redhat.com>
*/
#include "amdgpu_probe.h"
#include "amdgpu_version.h"
#include "amdpciids.h"
#include "xf86.h"
#include "xf86drmMode.h"
#include "dri.h"
#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__)
#include <xf86_OSproc.h>
#endif
#ifdef XSERVER_PLATFORM_BUS
#include <xf86platformBus.h>
#endif
#include "amdgpu_chipset_gen.h"
#include "amdgpu_pci_chipset_gen.h"
#include "amdgpu_pci_device_match_gen.h"
_X_EXPORT int gAMDGPUEntityIndex = -1;
/* Return the options for supported chipset 'n'; NULL otherwise */
static const OptionInfoRec *AMDGPUAvailableOptions(int chipid, int busid)
{
return AMDGPUOptionsWeak();
}
/* Return the string name for supported chipset 'n'; NULL otherwise. */
static void AMDGPUIdentify(int flags)
{
xf86PrintChipsets(AMDGPU_NAME,
"Driver for AMD Radeon chipsets", AMDGPUChipsets);
}
static Bool amdgpu_kernel_mode_enabled(ScrnInfoPtr pScrn,
struct pci_device *pci_dev)
{
char *busIdString;
int ret;
if (!xf86LoaderCheckSymbol("DRICreatePCIBusID")) {
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 0,
"[KMS] No DRICreatePCIBusID symbol, no kernel modesetting.\n");
return FALSE;
}
busIdString = DRICreatePCIBusID(pci_dev);
ret = drmCheckModesettingSupported(busIdString);
#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__)
if (ret) {
if (xf86LoadKernelModule("amdgpukms"))
ret = drmCheckModesettingSupported(busIdString);
}
#endif
free(busIdString);
if (ret) {
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 0,
"[KMS] drm report modesetting isn't supported.\n");
return FALSE;
}
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 0,
"[KMS] Kernel modesetting enabled.\n");
return TRUE;
}
static int amdgpu_kernel_open_fd(ScrnInfoPtr pScrn, struct pci_device *dev)
{
char *busid;
drmSetVersion sv;
int err;
int fd;
#if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,9,99,901,0)
XNFasprintf(&busid, "pci:%04x:%02x:%02x.%d",
dev->domain, dev->bus, dev->dev, dev->func);
#else
busid = XNFprintf("pci:%04x:%02x:%02x.%d",
dev->domain, dev->bus, dev->dev, dev->func);
#endif
fd = drmOpen(NULL, busid);
free(busid);
if (fd == -1) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"[drm] Failed to open DRM device for %s: %s\n",
busid, strerror(errno));
return fd;
}
/* Check that what we opened was a master or a master-capable FD,
* by setting the version of the interface we'll use to talk to it.
* (see DRIOpenDRMMaster() in DRI1)
*/
sv.drm_di_major = 1;
sv.drm_di_minor = 1;
sv.drm_dd_major = -1;
sv.drm_dd_minor = -1;
err = drmSetInterfaceVersion(fd, &sv);
if (err != 0) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"[drm] failed to set drm interface version.\n");
drmClose(fd);
return -1;
}
return fd;
}
static Bool amdgpu_get_scrninfo(int entity_num, void *pci_dev)
{
ScrnInfoPtr pScrn = NULL;
EntityInfoPtr pEnt;
DevUnion *pPriv;
AMDGPUEntPtr pAMDGPUEnt;
pScrn = xf86ConfigPciEntity(pScrn, 0, entity_num, AMDGPUPciChipsets,
NULL, NULL, NULL, NULL, NULL);
if (!pScrn)
return FALSE;
if (pci_dev) {
if (!amdgpu_kernel_mode_enabled(pScrn, pci_dev)) {
return FALSE;
}
}
pScrn->driverVersion = AMDGPU_VERSION_CURRENT;
pScrn->driverName = AMDGPU_DRIVER_NAME;
pScrn->name = AMDGPU_NAME;
pScrn->Probe = NULL;
pScrn->PreInit = AMDGPUPreInit_KMS;
pScrn->ScreenInit = AMDGPUScreenInit_KMS;
pScrn->SwitchMode = AMDGPUSwitchMode_KMS;
pScrn->AdjustFrame = AMDGPUAdjustFrame_KMS;
pScrn->EnterVT = AMDGPUEnterVT_KMS;
pScrn->LeaveVT = AMDGPULeaveVT_KMS;
pScrn->FreeScreen = AMDGPUFreeScreen_KMS;
pScrn->ValidMode = AMDGPUValidMode;
pEnt = xf86GetEntityInfo(entity_num);
/* Create a AMDGPUEntity for all chips, even with old single head
* Radeon, need to use pAMDGPUEnt for new monitor detection routines.
*/
xf86SetEntitySharable(entity_num);
if (gAMDGPUEntityIndex == -1)
gAMDGPUEntityIndex = xf86AllocateEntityPrivateIndex();
pPriv = xf86GetEntityPrivate(pEnt->index, gAMDGPUEntityIndex);
if (!pPriv->ptr) {
uint32_t major_version;
uint32_t minor_version;
pPriv->ptr = xnfcalloc(sizeof(AMDGPUEntRec), 1);
pAMDGPUEnt = pPriv->ptr;
pAMDGPUEnt->HasSecondary = FALSE;
pAMDGPUEnt->fd = amdgpu_kernel_open_fd(pScrn, pci_dev);
if (pAMDGPUEnt->fd < 0)
goto error_fd;
pAMDGPUEnt->fd_ref = 1;
if (amdgpu_device_initialize(pAMDGPUEnt->fd,
&major_version,
&minor_version,
&pAMDGPUEnt->pDev)) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"amdgpu_device_initialize failed\n");
goto error_amdgpu;
}
} else {
pAMDGPUEnt = pPriv->ptr;
pAMDGPUEnt->HasSecondary = TRUE;
}
xf86SetEntityInstanceForScreen(pScrn, pEnt->index,
xf86GetNumEntityInstances(pEnt->
index)
- 1);
free(pEnt);
return TRUE;
error_amdgpu:
drmClose(pAMDGPUEnt->fd);
pAMDGPUEnt->fd = 0;
error_fd:
free(pPriv->ptr);
return FALSE;
}
static Bool
amdgpu_pci_probe(DriverPtr pDriver,
int entity_num, struct pci_device *device, intptr_t match_data)
{
return amdgpu_get_scrninfo(entity_num, (void *)device);
}
static Bool AMDGPUDriverFunc(ScrnInfoPtr scrn, xorgDriverFuncOp op, void *data)
{
xorgHWFlags *flag;
switch (op) {
case GET_REQUIRED_HW_INTERFACES:
flag = (CARD32 *) data;
(*flag) = 0;
return TRUE;
default:
return FALSE;
}
}
#ifdef XSERVER_PLATFORM_BUS
static Bool
amdgpu_platform_probe(DriverPtr pDriver,
int entity_num, int flags,
struct xf86_platform_device *dev, intptr_t match_data)
{
ScrnInfoPtr pScrn;
int scr_flags = 0;
EntityInfoPtr pEnt;
DevUnion *pPriv;
AMDGPUEntPtr pAMDGPUEnt;
if (!dev->pdev)
return FALSE;
if (flags & PLATFORM_PROBE_GPU_SCREEN)
scr_flags = XF86_ALLOCATE_GPU_SCREEN;
pScrn = xf86AllocateScreen(pDriver, scr_flags);
if (xf86IsEntitySharable(entity_num))
xf86SetEntityShared(entity_num);
xf86AddEntityToScreen(pScrn, entity_num);
if (!amdgpu_kernel_mode_enabled(pScrn, dev->pdev))
return FALSE;
pScrn->driverVersion = AMDGPU_VERSION_CURRENT;
pScrn->driverName = AMDGPU_DRIVER_NAME;
pScrn->name = AMDGPU_NAME;
pScrn->Probe = NULL;
pScrn->PreInit = AMDGPUPreInit_KMS;
pScrn->ScreenInit = AMDGPUScreenInit_KMS;
pScrn->SwitchMode = AMDGPUSwitchMode_KMS;
pScrn->AdjustFrame = AMDGPUAdjustFrame_KMS;
pScrn->EnterVT = AMDGPUEnterVT_KMS;
pScrn->LeaveVT = AMDGPULeaveVT_KMS;
pScrn->FreeScreen = AMDGPUFreeScreen_KMS;
pScrn->ValidMode = AMDGPUValidMode;
pEnt = xf86GetEntityInfo(entity_num);
/* Create a AMDGPUEntity for all chips, even with old single head
* Radeon, need to use pAMDGPUEnt for new monitor detection routines.
*/
xf86SetEntitySharable(entity_num);
if (gAMDGPUEntityIndex == -1)
gAMDGPUEntityIndex = xf86AllocateEntityPrivateIndex();
pPriv = xf86GetEntityPrivate(pEnt->index, gAMDGPUEntityIndex);
if (!pPriv->ptr) {
uint32_t major_version;
uint32_t minor_version;
pPriv->ptr = xnfcalloc(sizeof(AMDGPUEntRec), 1);
pAMDGPUEnt = pPriv->ptr;
pAMDGPUEnt->HasSecondary = FALSE;
pAMDGPUEnt->fd = amdgpu_kernel_open_fd(pScrn, dev->pdev);
if (pAMDGPUEnt->fd < 0)
goto error_fd;
pAMDGPUEnt->fd_ref = 1;
if (amdgpu_device_initialize(pAMDGPUEnt->fd,
&major_version,
&minor_version,
&pAMDGPUEnt->pDev)) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"amdgpu_device_initialize failed\n");
goto error_amdgpu;
}
} else {
pAMDGPUEnt = pPriv->ptr;
pAMDGPUEnt->HasSecondary = TRUE;
}
xf86SetEntityInstanceForScreen(pScrn, pEnt->index,
xf86GetNumEntityInstances(pEnt->
index)
- 1);
free(pEnt);
return TRUE;
error_amdgpu:
drmClose(pAMDGPUEnt->fd);
pAMDGPUEnt->fd = 0;
error_fd:
free(pPriv->ptr);
return FALSE;
}
#endif
_X_EXPORT DriverRec AMDGPU = {
AMDGPU_VERSION_CURRENT,
AMDGPU_DRIVER_NAME,
AMDGPUIdentify,
NULL,
AMDGPUAvailableOptions,
NULL,
0,
AMDGPUDriverFunc,
amdgpu_device_match,
amdgpu_pci_probe,
#ifdef XSERVER_PLATFORM_BUS
amdgpu_platform_probe
#endif
};

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/*
* Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
* VA Linux Systems Inc., Fremont, California.
*
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation on the rights to use, copy, modify, merge,
* publish, distribute, sublicense, and/or sell copies of the Software,
* and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial
* portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR
* THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
/*
* Authors:
* Kevin E. Martin <martin@xfree86.org>
*
* Modified by Marc Aurele La France <tsi@xfree86.org> for ATI driver merge.
*/
#ifndef _AMDGPU_PROBE_H_
#define _AMDGPU_PROBE_H_ 1
#include <stdint.h>
#include "xf86str.h"
#include "xf86DDC.h"
#include "randrstr.h"
#include "xf86Crtc.h"
#include <amdgpu.h>
#include "compat-api.h"
extern DriverRec AMDGPU;
typedef enum {
CHIP_FAMILY_UNKNOW,
CHIP_FAMILY_LEGACY,
CHIP_FAMILY_AMDGPU,
CHIP_FAMILY_BONAIRE,
CHIP_FAMILY_KAVERI,
CHIP_FAMILY_KABINI,
CHIP_FAMILY_HAWAII,
CHIP_FAMILY_TOPAZ,
CHIP_FAMILY_TONGA,
CHIP_FAMILY_CARRIZO,
CHIP_FAMILY_LAST
} AMDGPUChipFamily;
typedef struct {
uint32_t pci_device_id;
AMDGPUChipFamily chip_family;
} AMDGPUCardInfo;
typedef struct {
Bool HasSecondary;
Bool HasCRTC2; /* All cards except original Radeon */
ScrnInfoPtr pSecondaryScrn;
ScrnInfoPtr pPrimaryScrn;
amdgpu_device_handle pDev;
int fd; /* for sharing across zaphod heads */
int fd_ref;
unsigned long fd_wakeup_registered; /* server generation for which fd has been registered for wakeup handling */
int fd_wakeup_ref;
} AMDGPUEntRec, *AMDGPUEntPtr;
extern const OptionInfoRec *AMDGPUOptionsWeak(void);
extern Bool AMDGPUPreInit_KMS(ScrnInfoPtr, int);
extern Bool AMDGPUScreenInit_KMS(SCREEN_INIT_ARGS_DECL);
extern Bool AMDGPUSwitchMode_KMS(SWITCH_MODE_ARGS_DECL);
extern void AMDGPUAdjustFrame_KMS(ADJUST_FRAME_ARGS_DECL);
extern Bool AMDGPUEnterVT_KMS(VT_FUNC_ARGS_DECL);
extern void AMDGPULeaveVT_KMS(VT_FUNC_ARGS_DECL);
extern void AMDGPUFreeScreen_KMS(FREE_SCREEN_ARGS_DECL);
extern ModeStatus AMDGPUValidMode(SCRN_ARG_TYPE arg, DisplayModePtr mode,
Bool verbose, int flag);
#endif /* _AMDGPU_PROBE_H_ */

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/*
* Copyright 2000 through 2004 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
*
* Permission to use, copy, modify, distribute, and sell this software and its
* documentation for any purpose is hereby granted without fee, provided that
* the above copyright notice appear in all copies and that both that copyright
* notice and this permission notice appear in supporting documentation, and
* that the name of Marc Aurele La France not be used in advertising or
* publicity pertaining to distribution of the software without specific,
* written prior permission. Marc Aurele La France makes no representations
* about the suitability of this software for any purpose. It is provided
* "as-is" without express or implied warranty.
*
* MARC AURELE LA FRANCE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO
* EVENT SHALL MARC AURELE LA FRANCE BE LIABLE FOR ANY SPECIAL, INDIRECT OR
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
* DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
#ifndef _AMDGPU_VERSION_H_
#define _AMDGPU_VERSION_H_ 1
#undef AMDGPU_NAME
#undef AMDGPU_DRIVER_NAME
#undef R200_DRIVER_NAME
#undef AMDGPU_VERSION_MAJOR
#undef AMDGPU_VERSION_MINOR
#undef AMDGPU_VERSION_PATCH
#undef AMDGPU_VERSION_CURRENT
#undef AMDGPU_VERSION_EVALUATE
#undef AMDGPU_VERSION_STRINGIFY
#undef AMDGPU_VERSION_NAME
#define AMDGPU_NAME "AMDGPU"
#define AMDGPU_DRIVER_NAME "amdgpu"
#define SI_DRIVER_NAME "radeonsi"
#define AMDGPU_VERSION_MAJOR PACKAGE_VERSION_MAJOR
#define AMDGPU_VERSION_MINOR PACKAGE_VERSION_MINOR
#define AMDGPU_VERSION_PATCH PACKAGE_VERSION_PATCHLEVEL
#ifndef AMDGPU_VERSION_EXTRA
#define AMDGPU_VERSION_EXTRA ""
#endif
#define AMDGPU_VERSION_CURRENT \
((AMDGPU_VERSION_MAJOR << 20) | \
(AMDGPU_VERSION_MINOR << 10) | \
(AMDGPU_VERSION_PATCH))
#define AMDGPU_VERSION_EVALUATE(__x) #__x
#define AMDGPU_VERSION_STRINGIFY(_x) AMDGPU_VERSION_EVALUATE(_x)
#define AMDGPU_VERSION_NAME \
AMDGPU_VERSION_STRINGIFY(AMDGPU_VERSION_MAJOR) "." \
AMDGPU_VERSION_STRINGIFY(AMDGPU_VERSION_MINOR) "." \
AMDGPU_VERSION_STRINGIFY(AMDGPU_VERSION_PATCH) AMDGPU_VERSION_EXTRA
#endif /* _AMDGPU_VERSION_H_ */

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#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include <stdlib.h>
#include <string.h>
#include <stdio.h>
#include <math.h>
#include "amdgpu_drv.h"
#include "amdgpu_probe.h"
#include "amdgpu_video.h"
#include "amdgpu_pixmap.h"
#include "xf86.h"
#include "dixstruct.h"
/* DPMS */
#ifdef HAVE_XEXTPROTO_71
#include <X11/extensions/dpmsconst.h>
#else
#define DPMS_SERVER
#include <X11/extensions/dpms.h>
#endif
#include <X11/extensions/Xv.h>
#include "fourcc.h"
#define OFF_DELAY 250 /* milliseconds */
#define FREE_DELAY 15000
#define OFF_TIMER 0x01
#define FREE_TIMER 0x02
#define CLIENT_VIDEO_ON 0x04
static void amdgpu_box_intersect(BoxPtr dest, BoxPtr a, BoxPtr b)
{
dest->x1 = a->x1 > b->x1 ? a->x1 : b->x1;
dest->x2 = a->x2 < b->x2 ? a->x2 : b->x2;
dest->y1 = a->y1 > b->y1 ? a->y1 : b->y1;
dest->y2 = a->y2 < b->y2 ? a->y2 : b->y2;
if (dest->x1 >= dest->x2 || dest->y1 >= dest->y2)
dest->x1 = dest->x2 = dest->y1 = dest->y2 = 0;
}
static void amdgpu_crtc_box(xf86CrtcPtr crtc, BoxPtr crtc_box)
{
if (crtc->enabled) {
crtc_box->x1 = crtc->x;
crtc_box->x2 =
crtc->x + xf86ModeWidth(&crtc->mode, crtc->rotation);
crtc_box->y1 = crtc->y;
crtc_box->y2 =
crtc->y + xf86ModeHeight(&crtc->mode, crtc->rotation);
} else
crtc_box->x1 = crtc_box->x2 = crtc_box->y1 = crtc_box->y2 = 0;
}
static int amdgpu_box_area(BoxPtr box)
{
return (int)(box->x2 - box->x1) * (int)(box->y2 - box->y1);
}
Bool amdgpu_crtc_is_enabled(xf86CrtcPtr crtc)
{
drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private;
return drmmode_crtc->dpms_mode == DPMSModeOn;
}
uint32_t amdgpu_get_interpolated_vblanks(xf86CrtcPtr crtc)
{
drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private;
return drmmode_crtc->interpolated_vblanks;
}
xf86CrtcPtr
amdgpu_pick_best_crtc(ScrnInfoPtr pScrn, Bool consider_disabled,
int x1, int x2, int y1, int y2)
{
xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
int coverage, best_coverage, c;
BoxRec box, crtc_box, cover_box;
RROutputPtr primary_output = NULL;
xf86CrtcPtr best_crtc = NULL, primary_crtc = NULL;
if (!pScrn->vtSema)
return NULL;
box.x1 = x1;
box.x2 = x2;
box.y1 = y1;
box.y2 = y2;
best_coverage = 0;
/* Prefer the CRTC of the primary output */
#ifdef HAS_DIXREGISTERPRIVATEKEY
if (dixPrivateKeyRegistered(rrPrivKey))
#endif
{
primary_output = RRFirstOutput(pScrn->pScreen);
}
if (primary_output && primary_output->crtc)
primary_crtc = primary_output->crtc->devPrivate;
/* first consider only enabled CRTCs */
for (c = 0; c < xf86_config->num_crtc; c++) {
xf86CrtcPtr crtc = xf86_config->crtc[c];
if (!amdgpu_crtc_is_enabled(crtc))
continue;
amdgpu_crtc_box(crtc, &crtc_box);
amdgpu_box_intersect(&cover_box, &crtc_box, &box);
coverage = amdgpu_box_area(&cover_box);
if (coverage > best_coverage ||
(coverage == best_coverage && crtc == primary_crtc)) {
best_crtc = crtc;
best_coverage = coverage;
}
}
if (best_crtc || !consider_disabled)
return best_crtc;
/* if we found nothing, repeat the search including disabled CRTCs */
for (c = 0; c < xf86_config->num_crtc; c++) {
xf86CrtcPtr crtc = xf86_config->crtc[c];
amdgpu_crtc_box(crtc, &crtc_box);
amdgpu_box_intersect(&cover_box, &crtc_box, &box);
coverage = amdgpu_box_area(&cover_box);
if (coverage > best_coverage ||
(coverage == best_coverage && crtc == primary_crtc)) {
best_crtc = crtc;
best_coverage = coverage;
}
}
return best_crtc;
}
void AMDGPUInitVideo(ScreenPtr pScreen)
{
ScrnInfoPtr pScrn = xf86ScreenToScrn(pScreen);
AMDGPUInfoPtr info = AMDGPUPTR(pScrn);
XF86VideoAdaptorPtr *adaptors, *newAdaptors = NULL;
XF86VideoAdaptorPtr texturedAdaptor = NULL;
int num_adaptors;
num_adaptors = xf86XVListGenericAdaptors(pScrn, &adaptors);
newAdaptors =
malloc((num_adaptors + 2) * sizeof(XF86VideoAdaptorPtr *));
if (newAdaptors == NULL)
return;
memcpy(newAdaptors, adaptors,
num_adaptors * sizeof(XF86VideoAdaptorPtr));
adaptors = newAdaptors;
if (info->use_glamor) {
texturedAdaptor = amdgpu_glamor_xv_init(pScreen, 16);
if (texturedAdaptor != NULL) {
adaptors[num_adaptors++] = texturedAdaptor;
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Set up textured video (glamor)\n");
} else
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Failed to set up textured video (glamor)\n");
}
if (num_adaptors)
xf86XVScreenInit(pScreen, adaptors, num_adaptors);
if (newAdaptors)
free(newAdaptors);
}

12
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#ifndef __AMDGPU_VIDEO_H__
#define __AMDGPU_VIDEO_H__
#include "xf86i2c.h"
#include "i2c_def.h"
#include "xf86Crtc.h"
Bool amdgpu_crtc_is_enabled(xf86CrtcPtr crtc);
uint32_t amdgpu_get_interpolated_vblanks(xf86CrtcPtr crtc);
#endif /* __AMDGPU_VIDEO_H__ */

39
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/*
* Copyright 2014 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#ifndef _AMDPCIIDS_H
#define _AMDPCIIDS_H
#define PCI_VENDOR_ATI 0x1002
#include "ati_pciids_gen.h"
typedef struct pci_device *pciVideoPtr;
#define PCI_DEV_DEVICE_ID(_pcidev) ((_pcidev)->device_id)
#define ATI_DEVICE_MATCH(d, i) \
{ PCI_VENDOR_ATI, (d), PCI_MATCH_ANY, PCI_MATCH_ANY, 0, 0, (i) }
#endif /* AMDPCIIDS_H */

73
src/ati_pciids_gen.h Normal file
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#define PCI_CHIP_BONAIRE_6640 0x6640
#define PCI_CHIP_BONAIRE_6641 0x6641
#define PCI_CHIP_BONAIRE_6649 0x6649
#define PCI_CHIP_BONAIRE_6650 0x6650
#define PCI_CHIP_BONAIRE_6651 0x6651
#define PCI_CHIP_BONAIRE_6658 0x6658
#define PCI_CHIP_BONAIRE_665C 0x665C
#define PCI_CHIP_BONAIRE_665D 0x665D
#define PCI_CHIP_KABINI_9830 0x9830
#define PCI_CHIP_KABINI_9831 0x9831
#define PCI_CHIP_KABINI_9832 0x9832
#define PCI_CHIP_KABINI_9833 0x9833
#define PCI_CHIP_KABINI_9834 0x9834
#define PCI_CHIP_KABINI_9835 0x9835
#define PCI_CHIP_KABINI_9836 0x9836
#define PCI_CHIP_KABINI_9837 0x9837
#define PCI_CHIP_KABINI_9838 0x9838
#define PCI_CHIP_KABINI_9839 0x9839
#define PCI_CHIP_KABINI_983A 0x983A
#define PCI_CHIP_KABINI_983B 0x983B
#define PCI_CHIP_KABINI_983C 0x983C
#define PCI_CHIP_KABINI_983D 0x983D
#define PCI_CHIP_KABINI_983E 0x983E
#define PCI_CHIP_KABINI_983F 0x983F
#define PCI_CHIP_KAVERI_1304 0x1304
#define PCI_CHIP_KAVERI_1305 0x1305
#define PCI_CHIP_KAVERI_1306 0x1306
#define PCI_CHIP_KAVERI_1307 0x1307
#define PCI_CHIP_KAVERI_1309 0x1309
#define PCI_CHIP_KAVERI_130A 0x130A
#define PCI_CHIP_KAVERI_130B 0x130B
#define PCI_CHIP_KAVERI_130C 0x130C
#define PCI_CHIP_KAVERI_130D 0x130D
#define PCI_CHIP_KAVERI_130E 0x130E
#define PCI_CHIP_KAVERI_130F 0x130F
#define PCI_CHIP_KAVERI_1310 0x1310
#define PCI_CHIP_KAVERI_1311 0x1311
#define PCI_CHIP_KAVERI_1312 0x1312
#define PCI_CHIP_KAVERI_1313 0x1313
#define PCI_CHIP_KAVERI_1315 0x1315
#define PCI_CHIP_KAVERI_1316 0x1316
#define PCI_CHIP_KAVERI_1317 0x1317
#define PCI_CHIP_KAVERI_131B 0x131B
#define PCI_CHIP_KAVERI_131C 0x131C
#define PCI_CHIP_KAVERI_131D 0x131D
#define PCI_CHIP_HAWAII_67A0 0x67A0
#define PCI_CHIP_HAWAII_67A1 0x67A1
#define PCI_CHIP_HAWAII_67A2 0x67A2
#define PCI_CHIP_HAWAII_67A8 0x67A8
#define PCI_CHIP_HAWAII_67A9 0x67A9
#define PCI_CHIP_HAWAII_67AA 0x67AA
#define PCI_CHIP_HAWAII_67B0 0x67B0
#define PCI_CHIP_HAWAII_67B1 0x67B1
#define PCI_CHIP_HAWAII_67B8 0x67B8
#define PCI_CHIP_HAWAII_67B9 0x67B9
#define PCI_CHIP_HAWAII_67BA 0x67BA
#define PCI_CHIP_HAWAII_67BE 0x67BE
#define PCI_CHIP_TOPAZ_6900 0x6900
#define PCI_CHIP_TOPAZ_6901 0x6901
#define PCI_CHIP_TOPAZ_6902 0x6902
#define PCI_CHIP_TOPAZ_6903 0x6903
#define PCI_CHIP_TOPAZ_6907 0x6907
#define PCI_CHIP_TONGA_6920 0x6920
#define PCI_CHIP_TONGA_6921 0x6921
#define PCI_CHIP_TONGA_6938 0x6938
#define PCI_CHIP_TONGA_6939 0x6939
#define PCI_CHIP_TONGA_692B 0x692B
#define PCI_CHIP_TONGA_692F 0x692F
#define PCI_CHIP_CARRIZO_9870 0x9870
#define PCI_CHIP_CARRIZO_9874 0x9874
#define PCI_CHIP_CARRIZO_9875 0x9875
#define PCI_CHIP_CARRIZO_9876 0x9876
#define PCI_CHIP_CARRIZO_9877 0x9877

94
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/*
* Copyright 2012 Red Hat, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
* Author: Dave Airlie <airlied@redhat.com>
*/
/* this file provides API compat between server post 1.13 and pre it,
it should be reused inside as many drivers as possible */
#ifndef COMPAT_API_H
#define COMPAT_API_H
#ifndef GLYPH_HAS_GLYPH_PICTURE_ACCESSOR
#define GetGlyphPicture(g, s) GlyphPicture((g))[(s)->myNum]
#define SetGlyphPicture(g, s, p) GlyphPicture((g))[(s)->myNum] = p
#endif
#ifndef XF86_HAS_SCRN_CONV
#define xf86ScreenToScrn(s) xf86Screens[(s)->myNum]
#define xf86ScrnToScreen(s) screenInfo.screens[(s)->scrnIndex]
#endif
#ifndef XF86_SCRN_INTERFACE
#define SCRN_ARG_TYPE int
#define SCRN_INFO_PTR(arg1) ScrnInfoPtr pScrn = xf86Screens[(arg1)]
#define SCREEN_ARG_TYPE int
#define SCREEN_PTR(arg1) ScreenPtr pScreen = screenInfo.screens[(arg1)]
#define SCREEN_INIT_ARGS_DECL int i, ScreenPtr pScreen, int argc, char **argv
#define BLOCKHANDLER_ARGS_DECL int arg, pointer blockData, pointer pTimeout, pointer pReadmask
#define BLOCKHANDLER_ARGS arg, blockData, pTimeout, pReadmask
#define CLOSE_SCREEN_ARGS_DECL int scrnIndex, ScreenPtr pScreen
#define CLOSE_SCREEN_ARGS scrnIndex, pScreen
#define ADJUST_FRAME_ARGS_DECL int arg, int x, int y, int flags
#define SWITCH_MODE_ARGS_DECL int arg, DisplayModePtr mode, int flags
#define FREE_SCREEN_ARGS_DECL int arg, int flags
#define VT_FUNC_ARGS_DECL int arg, int flags
#define VT_FUNC_ARGS(flags) pScrn->scrnIndex, (flags)
#define XF86_ENABLEDISABLEFB_ARG(x) ((x)->scrnIndex)
#else
#define SCRN_ARG_TYPE ScrnInfoPtr
#define SCRN_INFO_PTR(arg1) ScrnInfoPtr pScrn = (arg1)
#define SCREEN_ARG_TYPE ScreenPtr
#define SCREEN_PTR(arg1) ScreenPtr pScreen = (arg1)
#define SCREEN_INIT_ARGS_DECL ScreenPtr pScreen, int argc, char **argv
#define BLOCKHANDLER_ARGS_DECL ScreenPtr arg, pointer pTimeout, pointer pReadmask
#define BLOCKHANDLER_ARGS arg, pTimeout, pReadmask
#define CLOSE_SCREEN_ARGS_DECL ScreenPtr pScreen
#define CLOSE_SCREEN_ARGS pScreen
#define ADJUST_FRAME_ARGS_DECL ScrnInfoPtr arg, int x, int y
#define SWITCH_MODE_ARGS_DECL ScrnInfoPtr arg, DisplayModePtr mode
#define FREE_SCREEN_ARGS_DECL ScrnInfoPtr arg
#define VT_FUNC_ARGS_DECL ScrnInfoPtr arg
#define VT_FUNC_ARGS(flags) pScrn
#define XF86_ENABLEDISABLEFB_ARG(x) (x)
#endif
#endif

1855
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125
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/*
* Copyright © 2007 Red Hat, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Authors:
* Dave Airlie <airlied@redhat.com>
*
*/
#ifndef DRMMODE_DISPLAY_H
#define DRMMODE_DISPLAY_H
#include "xf86drmMode.h"
#ifdef HAVE_LIBUDEV
#include "libudev.h"
#endif
#include "amdgpu_probe.h"
#include "amdgpu.h"
#ifndef DRM_CAP_TIMESTAMP_MONOTONIC
#define DRM_CAP_TIMESTAMP_MONOTONIC 0x6
#endif
typedef struct {
int fd;
unsigned fb_id;
drmModeResPtr mode_res;
drmModeFBPtr mode_fb;
int cpp;
ScrnInfoPtr scrn;
#ifdef HAVE_LIBUDEV
struct udev_monitor *uevent_monitor;
InputHandlerProc uevent_handler;
#endif
drmEventContext event_context;
} drmmode_rec, *drmmode_ptr;
typedef struct {
drmmode_ptr drmmode;
unsigned old_fb_id;
int flip_count;
void *event_data;
unsigned int fe_frame;
unsigned int fe_tv_sec;
unsigned int fe_tv_usec;
} drmmode_flipdata_rec, *drmmode_flipdata_ptr;
typedef struct {
drmmode_flipdata_ptr flipdata;
Bool dispatch_me;
} drmmode_flipevtcarrier_rec, *drmmode_flipevtcarrier_ptr;
typedef struct {
drmmode_ptr drmmode;
drmModeCrtcPtr mode_crtc;
int hw_id;
struct amdgpu_buffer *cursor_buffer;
struct amdgpu_buffer *rotate_buffer;
unsigned rotate_fb_id;
int dpms_mode;
CARD64 dpms_last_ust;
uint32_t dpms_last_seq;
int dpms_last_fps;
uint32_t interpolated_vblanks;
uint16_t lut_r[256], lut_g[256], lut_b[256];
int scanout_pixmap_x;
} drmmode_crtc_private_rec, *drmmode_crtc_private_ptr;
typedef struct {
drmModePropertyPtr mode_prop;
uint64_t value;
int num_atoms; /* if range prop, num_atoms == 1; if enum prop, num_atoms == num_enums + 1 */
Atom *atoms;
} drmmode_prop_rec, *drmmode_prop_ptr;
typedef struct {
drmmode_ptr drmmode;
int output_id;
drmModeConnectorPtr mode_output;
drmModeEncoderPtr *mode_encoders;
drmModePropertyBlobPtr edid_blob;
int dpms_enum_id;
int num_props;
drmmode_prop_ptr props;
int enc_mask;
int enc_clone_mask;
} drmmode_output_private_rec, *drmmode_output_private_ptr;
extern Bool drmmode_pre_init(ScrnInfoPtr pScrn, drmmode_ptr drmmode, int cpp);
extern void drmmode_init(ScrnInfoPtr pScrn, drmmode_ptr drmmode);
extern void drmmode_fini(ScrnInfoPtr pScrn, drmmode_ptr drmmode);
extern void drmmode_set_cursor(ScrnInfoPtr scrn, drmmode_ptr drmmode, int id,
struct amdgpu_buffer *bo);
void drmmode_adjust_frame(ScrnInfoPtr pScrn, drmmode_ptr drmmode, int x, int y);
extern Bool drmmode_set_desired_modes(ScrnInfoPtr pScrn, drmmode_ptr drmmode);
extern void drmmode_copy_fb(ScrnInfoPtr pScrn, drmmode_ptr drmmode);
extern Bool drmmode_setup_colormap(ScreenPtr pScreen, ScrnInfoPtr pScrn);
extern void drmmode_uevent_init(ScrnInfoPtr scrn, drmmode_ptr drmmode);
extern void drmmode_uevent_fini(ScrnInfoPtr scrn, drmmode_ptr drmmode);
extern int drmmode_get_pitch_align(ScrnInfoPtr scrn, int bpe);
Bool amdgpu_do_pageflip(ScrnInfoPtr scrn, struct amdgpu_buffer *new_front,
void *data, int ref_crtc_hw_id);
int drmmode_get_current_ust(int drm_fd, CARD64 * ust);
#endif

74
src/pcidb/ati_pciids.csv Normal file
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"#pciid","define","family","name"
"0x6640","BONAIRE_6640","BONAIRE","BONAIRE"
"0x6641","BONAIRE_6641","BONAIRE","BONAIRE"
"0x6649","BONAIRE_6649","BONAIRE","BONAIRE"
"0x6650","BONAIRE_6650","BONAIRE","BONAIRE"
"0x6651","BONAIRE_6651","BONAIRE","BONAIRE"
"0x6658","BONAIRE_6658","BONAIRE","BONAIRE"
"0x665C","BONAIRE_665C","BONAIRE","BONAIRE"
"0x665D","BONAIRE_665D","BONAIRE","BONAIRE"
"0x9830","KABINI_9830","KABINI","KABINI"
"0x9831","KABINI_9831","KABINI","KABINI"
"0x9832","KABINI_9832","KABINI","KABINI"
"0x9833","KABINI_9833","KABINI","KABINI"
"0x9834","KABINI_9834","KABINI","KABINI"
"0x9835","KABINI_9835","KABINI","KABINI"
"0x9836","KABINI_9836","KABINI","KABINI"
"0x9837","KABINI_9837","KABINI","KABINI"
"0x9838","KABINI_9838","KABINI","KABINI"
"0x9839","KABINI_9839","KABINI","KABINI"
"0x983A","KABINI_983A","KABINI","KABINI"
"0x983B","KABINI_983B","KABINI","KABINI"
"0x983C","KABINI_983C","KABINI","KABINI"
"0x983D","KABINI_983D","KABINI","KABINI"
"0x983E","KABINI_983E","KABINI","KABINI"
"0x983F","KABINI_983F","KABINI","KABINI"
"0x1304","KAVERI_1304","KAVERI","KAVERI"
"0x1305","KAVERI_1305","KAVERI","KAVERI"
"0x1306","KAVERI_1306","KAVERI","KAVERI"
"0x1307","KAVERI_1307","KAVERI","KAVERI"
"0x1309","KAVERI_1309","KAVERI","KAVERI"
"0x130A","KAVERI_130A","KAVERI","KAVERI"
"0x130B","KAVERI_130B","KAVERI","KAVERI"
"0x130C","KAVERI_130C","KAVERI","KAVERI"
"0x130D","KAVERI_130D","KAVERI","KAVERI"
"0x130E","KAVERI_130E","KAVERI","KAVERI"
"0x130F","KAVERI_130F","KAVERI","KAVERI"
"0x1310","KAVERI_1310","KAVERI","KAVERI"
"0x1311","KAVERI_1311","KAVERI","KAVERI"
"0x1312","KAVERI_1312","KAVERI","KAVERI"
"0x1313","KAVERI_1313","KAVERI","KAVERI"
"0x1315","KAVERI_1315","KAVERI","KAVERI"
"0x1316","KAVERI_1316","KAVERI","KAVERI"
"0x1317","KAVERI_1317","KAVERI","KAVERI"
"0x131B","KAVERI_131B","KAVERI","KAVERI"
"0x131C","KAVERI_131C","KAVERI","KAVERI"
"0x131D","KAVERI_131D","KAVERI","KAVERI"
"0x67A0","HAWAII_67A0","HAWAII","HAWAII"
"0x67A1","HAWAII_67A1","HAWAII","HAWAII"
"0x67A2","HAWAII_67A2","HAWAII","HAWAII"
"0x67A8","HAWAII_67A8","HAWAII","HAWAII"
"0x67A9","HAWAII_67A9","HAWAII","HAWAII"
"0x67AA","HAWAII_67AA","HAWAII","HAWAII"
"0x67B0","HAWAII_67B0","HAWAII","HAWAII"
"0x67B1","HAWAII_67B1","HAWAII","HAWAII"
"0x67B8","HAWAII_67B8","HAWAII","HAWAII"
"0x67B9","HAWAII_67B9","HAWAII","HAWAII"
"0x67BA","HAWAII_67BA","HAWAII","HAWAII"
"0x67BE","HAWAII_67BE","HAWAII","HAWAII"
"0x6900","TOPAZ_6900","TOPAZ","TOPAZ"
"0x6901","TOPAZ_6901","TOPAZ","TOPAZ"
"0x6902","TOPAZ_6902","TOPAZ","TOPAZ"
"0x6903","TOPAZ_6903","TOPAZ","TOPAZ"
"0x6907","TOPAZ_6907","TOPAZ","TOPAZ"
"0x6920","TONGA_6920","TONGA","TONGA"
"0x6921","TONGA_6921","TONGA","TONGA"
"0x6938","TONGA_6938","TONGA","TONGA"
"0x6939","TONGA_6939","TONGA","TONGA"
"0x692B","TONGA_692B","TONGA","TONGA"
"0x692F","TONGA_692F","TONGA","TONGA"
"0x9870","CARRIZO_9870","CARRIZO","CARRIZO"
"0x9874","CARRIZO_9874","CARRIZO","CARRIZO"
"0x9875","CARRIZO_9875","CARRIZO","CARRIZO"
"0x9876","CARRIZO_9876","CARRIZO","CARRIZO"
"0x9877","CARRIZO_9877","CARRIZO","CARRIZO"
1 #pciid define family name
2 0x6640 BONAIRE_6640 BONAIRE BONAIRE
3 0x6641 BONAIRE_6641 BONAIRE BONAIRE
4 0x6649 BONAIRE_6649 BONAIRE BONAIRE
5 0x6650 BONAIRE_6650 BONAIRE BONAIRE
6 0x6651 BONAIRE_6651 BONAIRE BONAIRE
7 0x6658 BONAIRE_6658 BONAIRE BONAIRE
8 0x665C BONAIRE_665C BONAIRE BONAIRE
9 0x665D BONAIRE_665D BONAIRE BONAIRE
10 0x9830 KABINI_9830 KABINI KABINI
11 0x9831 KABINI_9831 KABINI KABINI
12 0x9832 KABINI_9832 KABINI KABINI
13 0x9833 KABINI_9833 KABINI KABINI
14 0x9834 KABINI_9834 KABINI KABINI
15 0x9835 KABINI_9835 KABINI KABINI
16 0x9836 KABINI_9836 KABINI KABINI
17 0x9837 KABINI_9837 KABINI KABINI
18 0x9838 KABINI_9838 KABINI KABINI
19 0x9839 KABINI_9839 KABINI KABINI
20 0x983A KABINI_983A KABINI KABINI
21 0x983B KABINI_983B KABINI KABINI
22 0x983C KABINI_983C KABINI KABINI
23 0x983D KABINI_983D KABINI KABINI
24 0x983E KABINI_983E KABINI KABINI
25 0x983F KABINI_983F KABINI KABINI
26 0x1304 KAVERI_1304 KAVERI KAVERI
27 0x1305 KAVERI_1305 KAVERI KAVERI
28 0x1306 KAVERI_1306 KAVERI KAVERI
29 0x1307 KAVERI_1307 KAVERI KAVERI
30 0x1309 KAVERI_1309 KAVERI KAVERI
31 0x130A KAVERI_130A KAVERI KAVERI
32 0x130B KAVERI_130B KAVERI KAVERI
33 0x130C KAVERI_130C KAVERI KAVERI
34 0x130D KAVERI_130D KAVERI KAVERI
35 0x130E KAVERI_130E KAVERI KAVERI
36 0x130F KAVERI_130F KAVERI KAVERI
37 0x1310 KAVERI_1310 KAVERI KAVERI
38 0x1311 KAVERI_1311 KAVERI KAVERI
39 0x1312 KAVERI_1312 KAVERI KAVERI
40 0x1313 KAVERI_1313 KAVERI KAVERI
41 0x1315 KAVERI_1315 KAVERI KAVERI
42 0x1316 KAVERI_1316 KAVERI KAVERI
43 0x1317 KAVERI_1317 KAVERI KAVERI
44 0x131B KAVERI_131B KAVERI KAVERI
45 0x131C KAVERI_131C KAVERI KAVERI
46 0x131D KAVERI_131D KAVERI KAVERI
47 0x67A0 HAWAII_67A0 HAWAII HAWAII
48 0x67A1 HAWAII_67A1 HAWAII HAWAII
49 0x67A2 HAWAII_67A2 HAWAII HAWAII
50 0x67A8 HAWAII_67A8 HAWAII HAWAII
51 0x67A9 HAWAII_67A9 HAWAII HAWAII
52 0x67AA HAWAII_67AA HAWAII HAWAII
53 0x67B0 HAWAII_67B0 HAWAII HAWAII
54 0x67B1 HAWAII_67B1 HAWAII HAWAII
55 0x67B8 HAWAII_67B8 HAWAII HAWAII
56 0x67B9 HAWAII_67B9 HAWAII HAWAII
57 0x67BA HAWAII_67BA HAWAII HAWAII
58 0x67BE HAWAII_67BE HAWAII HAWAII
59 0x6900 TOPAZ_6900 TOPAZ TOPAZ
60 0x6901 TOPAZ_6901 TOPAZ TOPAZ
61 0x6902 TOPAZ_6902 TOPAZ TOPAZ
62 0x6903 TOPAZ_6903 TOPAZ TOPAZ
63 0x6907 TOPAZ_6907 TOPAZ TOPAZ
64 0x6920 TONGA_6920 TONGA TONGA
65 0x6921 TONGA_6921 TONGA TONGA
66 0x6938 TONGA_6938 TONGA TONGA
67 0x6939 TONGA_6939 TONGA TONGA
68 0x692B TONGA_692B TONGA TONGA
69 0x692F TONGA_692F TONGA TONGA
70 0x9870 CARRIZO_9870 CARRIZO CARRIZO
71 0x9874 CARRIZO_9874 CARRIZO CARRIZO
72 0x9875 CARRIZO_9875 CARRIZO CARRIZO
73 0x9876 CARRIZO_9876 CARRIZO CARRIZO
74 0x9877 CARRIZO_9877 CARRIZO CARRIZO

70
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#!/usr/bin/perl
#
# Copyright 2007 Red Hat Inc.
# This crappy script written by Dave Airlie to avoid hassle of adding
# ids in every place.
#
use strict;
use warnings;
use Text::CSV_XS;
my $file = $ARGV[0];
my $atioutfile = 'ati_pciids_gen.h';
my $amdgpupcichipsetfile = 'amdgpu_pci_chipset_gen.h';
my $amdgpupcidevicematchfile = 'amdgpu_pci_device_match_gen.h';
my $amdgpuchipsetfile = 'amdgpu_chipset_gen.h';
my $amdgpuchipinfofile = 'amdgpu_chipinfo_gen.h';
my $csv = Text::CSV_XS->new();
open (CSV, "<", $file) or die $!;
open (ATIOUT, ">", $atioutfile) or die;
open (PCICHIPSET, ">", $amdgpupcichipsetfile) or die;
open (PCIDEVICEMATCH, ">", $amdgpupcidevicematchfile) or die;
open (AMDGPUCHIPSET, ">", $amdgpuchipsetfile) or die;
open (AMDGPUCHIPINFO, ">", $amdgpuchipinfofile) or die;
print AMDGPUCHIPSET "/* This file is autogenerated please do not edit */\n";
print AMDGPUCHIPSET "SymTabRec AMDGPUChipsets[] = {\n";
print PCICHIPSET "/* This file is autogenerated please do not edit */\n";
print PCICHIPSET "static PciChipsets AMDGPUPciChipsets[] = {\n";
print PCIDEVICEMATCH "/* This file is autogenerated please do not edit */\n";
print PCIDEVICEMATCH "static const struct pci_id_match amdgpu_device_match[] = {\n";
print AMDGPUCHIPINFO "/* This file is autogenerated please do not edit */\n";
print AMDGPUCHIPINFO "static AMDGPUCardInfo AMDGPUCards[] = {\n";
while (<CSV>) {
if ($csv->parse($_)) {
my @columns = $csv->fields();
if ((substr($columns[0], 0, 1) ne "#")) {
print ATIOUT "#define PCI_CHIP_$columns[1] $columns[0]\n";
if (($columns[2] ne "R128") && ($columns[2] ne "MACH64") && ($columns[2] ne "MACH32")) {
print PCICHIPSET " { PCI_CHIP_$columns[1], PCI_CHIP_$columns[1], RES_SHARED_VGA },\n";
print PCIDEVICEMATCH " ATI_DEVICE_MATCH( PCI_CHIP_$columns[1], 0 ),\n";
print AMDGPUCHIPSET " { PCI_CHIP_$columns[1], \"$columns[3]\" },\n";
print AMDGPUCHIPINFO " { $columns[0], CHIP_FAMILY_$columns[2] },\n";
}
}
} else {
my $err = $csv->error_input;
print "Failed to parse line: $err";
}
}
print AMDGPUCHIPINFO "};\n";
print AMDGPUCHIPSET " { -1, NULL }\n};\n";
print PCICHIPSET " { -1, -1, RES_UNDEFINED }\n};\n";
print PCIDEVICEMATCH " { 0, 0, 0 }\n};\n";
close CSV;
close ATIOUT;
close PCICHIPSET;
close PCIDEVICEMATCH;
close AMDGPUCHIPSET;
close AMDGPUCHIPINFO;

201
src/simple_list.h Normal file
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/**
* \file simple_list.h
* Simple macros for type-safe, intrusive lists.
*
* Intended to work with a list sentinal which is created as an empty
* list. Insert & delete are O(1).
*
* \author
* (C) 1997, Keith Whitwell
*/
/*
* Mesa 3-D graphics library
* Version: 3.5
*
* Copyright (C) 1999-2001 Brian Paul All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
* AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef _SIMPLE_LIST_H
#define _SIMPLE_LIST_H
struct simple_node {
struct simple_node *next;
struct simple_node *prev;
};
/**
* Remove an element from list.
*
* \param elem element to remove.
*/
#define remove_from_list(elem) \
do { \
(elem)->next->prev = (elem)->prev; \
(elem)->prev->next = (elem)->next; \
} while (0)
/**
* Insert an element to the list head.
*
* \param list list.
* \param elem element to insert.
*/
#define insert_at_head(list, elem) \
do { \
(elem)->prev = list; \
(elem)->next = (list)->next; \
(list)->next->prev = elem; \
(list)->next = elem; \
} while(0)
/**
* Insert an element to the list tail.
*
* \param list list.
* \param elem element to insert.
*/
#define insert_at_tail(list, elem) \
do { \
(elem)->next = list; \
(elem)->prev = (list)->prev; \
(list)->prev->next = elem; \
(list)->prev = elem; \
} while(0)
/**
* Move an element to the list head.
*
* \param list list.
* \param elem element to move.
*/
#define move_to_head(list, elem) \
do { \
remove_from_list(elem); \
insert_at_head(list, elem); \
} while (0)
/**
* Move an element to the list tail.
*
* \param list list.
* \param elem element to move.
*/
#define move_to_tail(list, elem) \
do { \
remove_from_list(elem); \
insert_at_tail(list, elem); \
} while (0)
/**
* Make a empty list empty.
*
* \param sentinal list (sentinal element).
*/
#define make_empty_list(sentinal) \
do { \
(sentinal)->next = sentinal; \
(sentinal)->prev = sentinal; \
} while (0)
/**
* Get list first element.
*
* \param list list.
*
* \return pointer to first element.
*/
#define first_elem(list) ((list)->next)
/**
* Get list last element.
*
* \param list list.
*
* \return pointer to last element.
*/
#define last_elem(list) ((list)->prev)
/**
* Get next element.
*
* \param elem element.
*
* \return pointer to next element.
*/
#define next_elem(elem) ((elem)->next)
/**
* Get previous element.
*
* \param elem element.
*
* \return pointer to previous element.
*/
#define prev_elem(elem) ((elem)->prev)
/**
* Test whether element is at end of the list.
*
* \param list list.
* \param elem element.
*
* \return non-zero if element is at end of list, or zero otherwise.
*/
#define at_end(list, elem) ((elem) == (list))
/**
* Test if a list is empty.
*
* \param list list.
*
* \return non-zero if list empty, or zero otherwise.
*/
#define is_empty_list(list) ((list)->next == (list))
/**
* Walk through the elements of a list.
*
* \param ptr pointer to the current element.
* \param list list.
*
* \note It should be followed by a { } block or a single statement, as in a \c
* for loop.
*/
#define foreach(ptr, list) \
for( ptr=(list)->next ; ptr!=list ; ptr=(ptr)->next )
/**
* Walk through the elements of a list.
*
* Same as #foreach but lets you unlink the current value during a list
* traversal. Useful for freeing a list, element by element.
*
* \param ptr pointer to the current element.
* \param t temporary pointer.
* \param list list.
*
* \note It should be followed by a { } block or a single statement, as in a \c
* for loop.
*/
#define foreach_s(ptr, t, list) \
for(ptr=(list)->next,t=(ptr)->next; list != ptr; ptr=t, t=(t)->next)
#endif