mirror of
https://github.com/X11Libre/xf86-video-amdgpu.git
synced 2026-03-24 01:24:31 +00:00
dri3: implement sync objects support
with this, we have a full dri 1.4 implementation struct amdgpu_dri3_syncobj - wraps DRM syncobj handle with: syncobj_handle - DRM syncobj handle owns_handle - whether we own and should destroy the handle function pointers implemented: amdgpu_dri3_syncobj_free() - frees the syncobj and destroys the DRM handle amdgpu_dri3_syncobj_has_fence() - checks if syncobj has a fence amdgpu_dri3_syncobj_is_signaled() - checks if syncobj is signaled amdgpu_dri3_syncobj_export_fence() - exports syncobj to fence fd amdgpu_dri3_syncobj_import_fence() - imports fence fd into syncobj amdgpu_dri3_syncobj_signal() - signals the syncobj amdgpu_dri3_syncobj_submitted_eventfd() - eventfd submission callback amdgpu_dri3_syncobj_signaled_eventfd() - eventfd signaled callback import function: amdgpu_dri3_import_syncobj() - creates syncobj and optionally imports fence Updated dri3_screen_info_rec to version 4 with import_syncobj function pointer.
This commit is contained in:
Joseph Crowell
@@ -37,6 +37,258 @@
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#include <libgen.h>
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#include <drm/drm_fourcc.h>
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#include <drm/amdgpu_drm.h>
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#include <unistd.h>
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#include <poll.h>
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/* DRI3 Sync Object support (version 1.4) */
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#include <xf86drm.h>
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struct amdgpu_dri3_syncobj {
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struct dri3_syncobj base;
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uint32_t syncobj_handle; /* DRM syncobj handle */
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Bool owns_handle; /* Whether we own and should destroy the handle */
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};
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static void
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amdgpu_dri3_syncobj_free(struct dri3_syncobj *syncobj)
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{
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struct amdgpu_dri3_syncobj *amdgpu_syncobj =
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(struct amdgpu_dri3_syncobj *)syncobj;
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ScrnInfoPtr scrn = xf86ScreenToScrn(syncobj->screen);
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AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(scrn);
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struct drm_syncobj_destroy destroy_args;
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if (amdgpu_syncobj->owns_handle && amdgpu_syncobj->syncobj_handle != 0) {
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destroy_args.handle = amdgpu_syncobj->syncobj_handle;
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drmIoctl(pAMDGPUEnt->fd, DRM_IOCTL_SYNCOBJ_DESTROY, &destroy_args);
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}
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free(amdgpu_syncobj);
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}
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static Bool
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amdgpu_dri3_syncobj_has_fence(struct dri3_syncobj *syncobj, uint64_t point)
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{
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struct amdgpu_dri3_syncobj *amdgpu_syncobj =
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(struct amdgpu_dri3_syncobj *)syncobj;
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ScrnInfoPtr scrn = xf86ScreenToScrn(syncobj->screen);
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AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(scrn);
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struct drm_syncobj_handle handle_args;
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int ret;
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(void)point;
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/* Try to export the syncobj to see if it has a fence */
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handle_args.handle = amdgpu_syncobj->syncobj_handle;
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handle_args.flags = DRM_SYNCOBJ_HANDLE_TO_FD_FLAGS_EXPORT_SYNC_FILE;
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handle_args.fd = -1;
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handle_args.point = 0;
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ret = drmIoctl(pAMDGPUEnt->fd, DRM_IOCTL_SYNCOBJ_HANDLE_TO_FD, &handle_args);
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if (ret == 0) {
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/* Has a fence, close the fd we just got */
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close(handle_args.fd);
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return TRUE;
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}
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return FALSE;
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}
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static Bool
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amdgpu_dri3_syncobj_is_signaled(struct dri3_syncobj *syncobj, uint64_t point)
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{
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struct amdgpu_dri3_syncobj *amdgpu_syncobj =
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(struct amdgpu_dri3_syncobj *)syncobj;
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ScrnInfoPtr scrn = xf86ScreenToScrn(syncobj->screen);
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AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(scrn);
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struct drm_syncobj_wait wait_args;
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int ret;
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/* Set up wait args for non-blocking check */
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wait_args.handles = (uint64_t)(uintptr_t)&amdgpu_syncobj->syncobj_handle;
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wait_args.count_handles = 1;
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wait_args.timeout_nsec = 0; /* Non-blocking */
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wait_args.flags = 0;
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wait_args.first_signaled = 0;
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wait_args.pad = 0;
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(void)point;
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ret = drmIoctl(pAMDGPUEnt->fd, DRM_IOCTL_SYNCOBJ_WAIT, &wait_args);
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/* Return TRUE if wait succeeded (fence is signaled) or ioctl failed in a way
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* that indicates the fence is not present (ENOENT means handle not found) */
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if (ret == 0)
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return TRUE; /* signaled */
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if (ret == -1 && (errno == ENOENT || errno == EINVAL))
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return TRUE; /* no fence means signaled */
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return FALSE; /* not signaled */
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}
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static int
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amdgpu_dri3_syncobj_export_fence(struct dri3_syncobj *syncobj, uint64_t point)
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{
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struct amdgpu_dri3_syncobj *amdgpu_syncobj =
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(struct amdgpu_dri3_syncobj *)syncobj;
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ScrnInfoPtr scrn = xf86ScreenToScrn(syncobj->screen);
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AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(scrn);
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struct drm_syncobj_handle handle_args;
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int ret;
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(void)point;
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handle_args.handle = amdgpu_syncobj->syncobj_handle;
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handle_args.flags = DRM_SYNCOBJ_HANDLE_TO_FD_FLAGS_EXPORT_SYNC_FILE;
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handle_args.fd = -1;
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handle_args.point = 0;
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ret = drmIoctl(pAMDGPUEnt->fd, DRM_IOCTL_SYNCOBJ_HANDLE_TO_FD, &handle_args);
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if (ret != 0)
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return -1;
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return handle_args.fd;
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}
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static void
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amdgpu_dri3_syncobj_import_fence(struct dri3_syncobj *syncobj, uint64_t point, int fd)
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{
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struct amdgpu_dri3_syncobj *amdgpu_syncobj =
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(struct amdgpu_dri3_syncobj *)syncobj;
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ScrnInfoPtr scrn = xf86ScreenToScrn(syncobj->screen);
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AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(scrn);
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struct drm_syncobj_handle handle_args;
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int ret;
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(void)point;
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/* First reset the syncobj */
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struct drm_syncobj_array reset_args = {
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.handles = (uint64_t)(uintptr_t)&amdgpu_syncobj->syncobj_handle,
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.count_handles = 1,
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};
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drmIoctl(pAMDGPUEnt->fd, DRM_IOCTL_SYNCOBJ_RESET, &reset_args);
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/* Then import the fence fd into the syncobj */
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handle_args.handle = amdgpu_syncobj->syncobj_handle;
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handle_args.flags = DRM_SYNCOBJ_FD_TO_HANDLE_FLAGS_IMPORT_SYNC_FILE;
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handle_args.fd = fd;
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handle_args.point = 0;
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ret = drmIoctl(pAMDGPUEnt->fd, DRM_IOCTL_SYNCOBJ_FD_TO_HANDLE, &handle_args);
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(void)ret;
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}
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static void
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amdgpu_dri3_syncobj_signal(struct dri3_syncobj *syncobj, uint64_t point)
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{
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struct amdgpu_dri3_syncobj *amdgpu_syncobj =
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(struct amdgpu_dri3_syncobj *)syncobj;
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ScrnInfoPtr scrn = xf86ScreenToScrn(syncobj->screen);
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AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(scrn);
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struct drm_syncobj_array signal_args;
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(void)point;
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signal_args.handles = (uint64_t)(uintptr_t)&amdgpu_syncobj->syncobj_handle;
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signal_args.count_handles = 1;
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drmIoctl(pAMDGPUEnt->fd, DRM_IOCTL_SYNCOBJ_SIGNAL, &signal_args);
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}
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static void
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amdgpu_dri3_syncobj_submitted_eventfd(struct dri3_syncobj *syncobj,
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uint64_t point, int efd)
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{
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/* Called when client submits an eventfd for signaling notification.
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* For AMDGPU, we handle this in the wait ioctl with eventfd support.
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*/
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(void)syncobj;
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(void)point;
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(void)efd;
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}
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static void
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amdgpu_dri3_syncobj_signaled_eventfd(struct dri3_syncobj *syncobj,
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uint64_t point, int efd)
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{
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/* Called when the syncobj has been signaled via eventfd.
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* For AMDGPU, this is handled by the kernel's eventfd notification.
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*/
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(void)syncobj;
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(void)point;
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(void)efd;
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}
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static struct dri3_syncobj *
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amdgpu_dri3_import_syncobj(ClientPtr client, ScreenPtr screen,
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XID id, int fd)
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{
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struct amdgpu_dri3_syncobj *amdgpu_syncobj;
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ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
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AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(scrn);
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struct drm_syncobj_create create_args;
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int ret;
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/* Create a new syncobj */
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create_args.handle = 0;
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create_args.flags = 0;
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ret = drmIoctl(pAMDGPUEnt->fd, DRM_IOCTL_SYNCOBJ_CREATE, &create_args);
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if (ret != 0) {
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xf86DrvMsg(scrn->scrnIndex, X_WARNING,
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"Failed to create DRM syncobj: %s\n", strerror(errno));
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return NULL;
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}
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/* Import the fence if provided */
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if (fd >= 0) {
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struct drm_syncobj_handle handle_args;
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handle_args.handle = create_args.handle;
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handle_args.flags = DRM_SYNCOBJ_FD_TO_HANDLE_FLAGS_IMPORT_SYNC_FILE;
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handle_args.fd = fd;
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handle_args.point = 0;
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ret = drmIoctl(pAMDGPUEnt->fd, DRM_IOCTL_SYNCOBJ_FD_TO_HANDLE, &handle_args);
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if (ret != 0) {
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xf86DrvMsg(scrn->scrnIndex, X_WARNING,
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"Failed to import fence into syncobj: %s\n",
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strerror(errno));
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struct drm_syncobj_destroy destroy_args = {
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.handle = create_args.handle
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};
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drmIoctl(pAMDGPUEnt->fd, DRM_IOCTL_SYNCOBJ_DESTROY, &destroy_args);
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return NULL;
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}
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}
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amdgpu_syncobj = calloc(1, sizeof(*amdgpu_syncobj));
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if (!amdgpu_syncobj) {
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struct drm_syncobj_destroy destroy_args = {
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.handle = create_args.handle
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};
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drmIoctl(pAMDGPUEnt->fd, DRM_IOCTL_SYNCOBJ_DESTROY, &destroy_args);
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return NULL;
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}
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amdgpu_syncobj->base.id = id;
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amdgpu_syncobj->base.screen = screen;
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amdgpu_syncobj->base.refcount = 1;
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amdgpu_syncobj->base.free = amdgpu_dri3_syncobj_free;
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amdgpu_syncobj->base.has_fence = amdgpu_dri3_syncobj_has_fence;
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amdgpu_syncobj->base.is_signaled = amdgpu_dri3_syncobj_is_signaled;
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amdgpu_syncobj->base.export_fence = amdgpu_dri3_syncobj_export_fence;
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amdgpu_syncobj->base.import_fence = amdgpu_dri3_syncobj_import_fence;
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amdgpu_syncobj->base.signal = amdgpu_dri3_syncobj_signal;
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amdgpu_syncobj->base.submitted_eventfd = amdgpu_dri3_syncobj_submitted_eventfd;
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amdgpu_syncobj->base.signaled_eventfd = amdgpu_dri3_syncobj_signaled_eventfd;
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amdgpu_syncobj->syncobj_handle = create_args.handle;
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amdgpu_syncobj->owns_handle = TRUE;
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(void)client;
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return &amdgpu_syncobj->base;
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}
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static int open_card_node(ScreenPtr screen, int *out)
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{
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@@ -644,7 +896,7 @@ amdgpu_dri3_get_drawable_modifiers(DrawablePtr draw, uint32_t format,
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}
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static dri3_screen_info_rec amdgpu_dri3_screen_info = {
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.version = 2,
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.version = 4,
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.open = amdgpu_dri3_open,
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.pixmap_from_fd = amdgpu_dri3_pixmap_from_fd,
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/* Version 1.1 */
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@@ -653,8 +905,9 @@ static dri3_screen_info_rec amdgpu_dri3_screen_info = {
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.pixmap_from_fds = amdgpu_dri3_pixmap_from_fds,
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.fds_from_pixmap = amdgpu_dri3_fds_from_pixmap,
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.get_formats = amdgpu_dri3_get_formats,
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.get_modifiers = amdgpu_dri3_get_modifiers
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/* Version 1.4 - get_drawable_modifiers set via glamor callback */
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.get_modifiers = amdgpu_dri3_get_modifiers,
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/* Version 1.4 */
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.import_syncobj = amdgpu_dri3_import_syncobj,
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};
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Bool
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